1. ECE 447 Fall 2009 Lecture 7: MSP430 Polling and Interrupts

2. Agenda Polling Introduction to Interrupts Class Example

3. ECE447: Polling Concept Main Program.............. Cycle continuously Polling routine Signal from device #1? Signal from device #2? Signal from device #N? Service device #1 Service device #2 Service device #N

4. ECE447: Loop usage for polling events public void main(void) { …. while ( !(P1IN & BIT0) ) ; // Correct …. } public void main(void) { …. while (P1IN & BIT0) { // Incorrect } …. } Loops can be used to poll events (both internal or external). The two examples on the left show the correct and incorrect usage of polling loops. The first loop holds the program in one spot until the condition evaluates false. The semi- colon is equivalent to a pair of empty brackets (“{ }”). This program will only move past this point once P1.0 is high. The second loop processes its contents as long as the condition is true. This usage is discouraged because the condition could change multiple times while the contents of the loop are executing.

5. ECE447: Loops in C and Assembly C // infinite loops for (;;) { // or while(1) { // do processing } // blocking loops while ( !(P1IN & BIT0) ); // process input // complex conditions while ( !(P1IN & BIT0) && !(P2IN & BIT0) ); // process input Assembly ; infinite loops Label1: ; do processing JMPLabel1; jump always ; blocking loops Label2: BIT.B#BIT0, &P1IN JZLabel2; jump if not set ; process input ; complex conditions Label3: BIT.B#BIT0, &P1IN JNZEnd_loop; jump if set BIT.B#BIT0, &P2IN JNZEnd_loop; jump if set JMPLabel3 End_loop: ; process input

6. ECE447: Interrupts Concept RETI

7. Interrupt Applications Urgent Tasks with a Higher priority than the main code Infrequent tasks (handling slow input from humans) Waking the CPU from Sleep Calls to an operating system

8. Interrupt Features Interrupts can be requested by most peripherals and some core MCU functions Each interrupt has a flag –This flag is “raised” (set) when the condition for the interrupt occurs –Each flag has a corresponding ENABLE bit which allows interrupt requests Maskable Interrupts –Effective only if the General Interrupt Enable (GIE) bit is set in the Status Register

9. ECE447: MSP430 Interrupts Overview Interrupt processing 1.Program Counter (PC) is stored on the stack 2.Status Register (SR) is stored on the stack 3.Interrupt flag is cleared 4.SR is cleared GIE = 0, disables interrupt Low power modes cancelled 5.PC is set to the calling interrupts vector value (e.g. value stored at 0xFFFC for NMI)

10. ECE447: Interrupt Trigger Types (Level/Edge) Level Sensitive: Interrupt triggers as long as the source is at certain level (high or low). Edge Sensitive: Interrupt triggers when the source changes from one state to another (high to low, low to high, or both) Note: The MSP430 offers only edge sensitive interrupts, and only one edge may be detected at a time. Interrupt on high level Falling Edge Rising Edge Both Edges

11. ECE447: External Interrupt Sources PINEvent / InterruptFlags RSTPower up, External Reset, Watchdog timer, Flash memory RSTIFG NMINon-maskable InterruptNMIIFG P1.0-7Pin change (8)P1IFG.0-7 P2.0-7Pin change (8)P2IFG.0-7 USCI input pins Universal Serial Communication Interface: Receive ready signal UCA0RXIFG, UCB0RXIFG USART input pins Universal Serial Asynchronous Receive Transmit: Receive ready signal URXIFG1

12. ECE447: MSP430 Reset Overview There are two levels to the RESET interrupt –Power-on Reset (POR) Power on (or brownout without SVS) Low signal on the /RST pin –Power-up Clear (PUC) Watchdog timer overflow Incorrect Watchdog password Incorrect flash memory password Fetch from reserved/unimplemented memory Status after RESET –Status Register (SR) cleared (low power modes cancelled) –Register and peripheral defaults initialized rw-0: bit reset to zero after PUC or POR rw-(0): bit reset to zero only after POR (rw = read/write) –Program Counter (PC) set to value stored at 0xFFFE (the reset vector)

13. ECE447: Internal Interrupt Sources Event / InterruptFlags Oscillator fault, Flash access violationOFIFG, ACCVIFG Timer B0TBCCTL0.CCIFG0 Timer B1 (7)TBCCTL1-6.CCIFG1- 6, TBIFG Comparator ACAIFG Watchdog Timer+WDTIFG Universal Serial Communication Interface: Transmit ready signal UCA0TXIFG, UCB0TXIFG Analog-to-Digital ConverterADC12IFG Timer A0TACCTL0.CCIFG0

14. ECE447: Internal Interrupt Sources (cont.) Event / InterruptFlags Timer A1 (7)TACCTL1-6.CCIFG1- 6, TAIFG Universal Serial Asynchronous Receive Transmit: Transmit ready signal URXIFG1 Basic Timer 1 / Real Time ClockBTIFG Direct Memory AccessDMA0IFG, DMA1IFG, DMA2IFG Digital-to-Analog ConverterDAC12.0IFG, DAC12.1IFG

15. ECE447: Class Exercise Write a routine in assembly that polls the P1.1 input pin of the MSP430 for the status of a button. As long as the logic signal on that pin remains high the MSP430 will output the pattern ‘0101’ on pins P1.4 to P1.7. When the button is released the output will invert to ‘1010’. This behavior should repeat indefinitely when the button is pressed and released.

16. Summary Polling Introduction to Interrupts Class Example