1. 1 EE121 John Wakerly Lecture #12 PLD-based state machine structures WITH statements Finite-memory state-machine design PLD-based state-machine design

2. 2 PLD-based state-machine timing

3. 3 Multiple PLDs registered pipelined registered pipelined

4. 4 Normal vs. pipelined Moore outputs Assume 3 state variables, Q1, Q2, Q3. Z = G(Q1, Q2, Q3) [Moore output] Z := ?? [equivalent pipelined Moore output] Transition equations Q1 := F1(Q1,Q2,Q3,inputs); Q2 := F2(Q1,Q2,Q3,inputs); Q3 := F3(Q1,Q2,Q3,inputs); Pipelined output equation: Z := G( F1(Q1,Q2,Q3,inputs), F2(Q1,Q2,Q3,inputs), F3(Q1,Q2,Q3,inputs) ); Can’t do this with Mealy outputs unless “inputs” are applied one clock tick earlier.

5. 5 WITH statements

6. 6 Example: Another combination lock Unlock after input sequence 0110111 Also provide “hint” output (1 => correct move).

7. 7

8. 8 WITH recommendations If you must use WITH statements, be sure to assign an output value for all states/transitions. Be very careful about registered vs. combinational assignments. It’s usually more convenient to specify output values using separate equations in the “equations” section of the program: UNLK = (S==X0110111) & (X==0); HINT = (S==ZIP) & (X==0) # (S==X0) & (X==1)... # (S==X0110111) & (X==0);

9. 9 Finite-Memory State Machines In general, a state machine’s future operation depends on all the inputs it received since reset. Some state machines depend only on the inputs received over the last few clock ticks. Idea: –Use a register to keep track of the machine’s input values over the last few clock ticks. –Determine the current output as a combinational function of the past inputs history.

10. 10 Example: the combination lock again This program has a bug (I can unlock in just six clock ticks after reset.)

11. 11 T-bird tail-lights example

12. 12 State diagram Inputs: LEFT, RIGHT, HAZ Outputs: Six lamps (function of state only

13. 13 ABEL program

14. 14 ABEL “state diagram”

15. 15 Output logic Implement this table in another PLD that has Q2, Q1, Q0 (QSTATE) as inputs. Total # of PLD outputs is 3 + 6 = 9.

16. 16 Output-coded state assignment Each state has a unique encoding using just the lamp-output bits.

17. 17 Sunnyvale Traffic-Light Controller

18. 18 Traffic-Light I/O Inputs –NSCAR (north-south car sensors) –EWCAR (east-west car sensors) –TMSHORT (short timer -- 5 seconds) –TMLONG (long timer -- 5 minutes) Outputs –NSRED, NSYELLOW, NSGREEN (lights) –EWRED, EWYELLOW, EWGREEN (lights) –TMRESET (timer start)

19. 19 State Diagram (ABEL) Outputs will be a function of state

20. 20 East-west states are symmetric.

21. 21 State encoding

22. 22 Output logic

23. 23 Output-coded state assignment

24. 24 Next Time Digital-to-analog conversion Analog-to-digital conversion Read D-to-A and A-to-D notes