Presentation is loading. Please wait.

Presentation is loading. Please wait.

ECE 102 Engineering Computation Chapter 9 LabJack Introduction Dr. Herbert G. Mayer, PSU Status 10/2/2015 For use at CCUT Fall 2015.

Similar presentations


Presentation on theme: "ECE 102 Engineering Computation Chapter 9 LabJack Introduction Dr. Herbert G. Mayer, PSU Status 10/2/2015 For use at CCUT Fall 2015."— Presentation transcript:

1 ECE 102 Engineering Computation Chapter 9 LabJack Introduction Dr. Herbert G. Mayer, PSU Status 10/2/2015 For use at CCUT Fall 2015

2 Syllabus LabJack HW Overview LabJack Features LabJack HW Control Input & Output Channels Digital Input Output\Analog Input Analog Output Summary

3 2 LabJack Hardware Overview The LabJack U3 is a basic external DAQ unit that is used to interface a computer to the physical world. Company website: http://labjack.com General tech support: http://labjack.com/support U3-specific support:http://labjack.com/u3

4 3 What can a LabJack do? Read the output of sensors which measure:  voltage, current, power, temperature  humidity, wind speed, force, pressure, strain  acceleration, RPM, light intensity, sound intensity  gas concentration, position, and many more A LabJack brings this data into a computer where it can be stored and processed. Control things like motors, lights, solenoids, relays, valves, and more.

5 4 LabJack Features Model U3-LV (Low Voltage) 16 flexible I/O (digital input, digital output, or analog input) Up to 16 12-bit analog inputs (0 → 2.4 V or 0 → 3.6 V, SE or Diff) Maximum input stream rate of 2.5 → 50 kHz 2 analog outputs (10-bit, 0-5 V, 16 Hz) 4 additional digital I/O Up to 2 timers (pulse timing, PWM output, quadrature input) Up to 2 counters (32 bit each) USB 2.0/1.1 interface → Connect to computer via USB cable Windows, Linux, Mac drivers Model U3-HV (High Voltage) First 4 FIO are replaced by dedicated HV analog inputs The HV inputs have ±10 V or -10/+20 V range

6 5 Model U3-LV Pinouts: VS = +5 V DC GND = ground FIOxx = flexible I/O AINx = analog input DACx = analog output DB15 Port USB Port DAC1 FIO0 FIO1 FIO2 FIO3 SGND SPC DAC0SGND GND VS GND FIO7 FIO6 GND VS GND VSFIO5 FIO4 GND VS DB15 Port USB Port DAC1 AIN0 AIN1 AIN2 AIN3 SGND SPC DAC0SGND GND VS GND FIO7 FIO6 GND VS GND VSFIO5 FIO4 GND VS Model U3-HV Pinouts:

7 6 DB15 & USB Ports screw terminals status LED USB (type B) DB15 (EIO & CIO) DB15 Female Connector Pinout EIO2 CIO1GND VSCIO3 EIO0EIO4 EIO6 EIO1 CIO0EIO7 CIO2 GNDEIO3 EIO5 12345678 9101112131415 VS = +5 V DC GND = ground EIOxx = 8 flexible I/O CIOx = 4 dedicated digital I/O

8 7 LabJack HW Control  LabJack company-supplied software Windows configuration utility: LJControlPanel  3 rd party software e.g., DAQFactory Express  User developed software Supported languages include: C/C++, VC6,.NET, Java Python, VB6, PureBasic MATLAB LabVIEW, VEE

9 8 Ground & VS  GND is an electrical ground point. (USB → PC → AC mains)  VS is a fixed +5 V DC output voltage. These can be used to power external circuits. Maximum current: 450 mA DAC1 FIO0 FIO1 FIO2 FIO3 SGND SPC DAC0SGND GND VS GND FIO7 FIO6 GND VS GND VSFIO5 FIO4 GND VS

10 9 Input & Output Channels An I/O channel is a hardware circuit inside the LabJack that can  Sense an input signal  Generate an output signal Supported signals:  Digital (binary levels)  Analog (continuous levels)

11 10 LabJack Channels (U3-LV model) FIO (16: FIO0-FIO7 terminals EIO0-EIO7 DB15)  Flexible - can be any one of the following: Digital input or output Analog input Timer Counter DAC (2: DAC0-DAC1 terminals)  Analog output only CIO (4: CIO-CIO3 DB15)  Digital input or output only DAC1 FIO0 FIO1 FIO2 FIO3 SGND SPC DAC0SGND GND VS GND FIO7 FIO6 GND VS GND VSFIO5 FIO4 GND VS

12 11 Digital Input Output Input → Sense a low or high input voltage Output-Low → Force a low output voltage Output-High → Force a high output voltage FIO: R = 550 Ω EIO/CIO: R = 180 Ω GND Output = 0 V R +3.3 V Output = +3.3 V (no load) R FIO: R = 550 Ω EIO/CIO: R = 180 Ω +3.3 V Maximum Input Limit FIO: -10 V to +10 V EIO: -6 V to +6 V Sense 100K Ω Sense: 0 = Low, 1 = High

13 12 Analog Input Single-ended  One analog input is required  Input voltage is measured with respect to ground Differential  Two analog inputs are required  The voltage difference between the input and the reference is measured (i.e., V Input – V Reference ) AINx GND Input Ground AINx AINy Input Reference Maximum Input Limit FIO: -10 V to +10 V EIO: -6 V to +6 V Sense: 0 to +2.44 Input values < 0 V are reported as 0 V. Input values > +2.44 V are reported as +2.44 V

14 13 Analog Input Sampling Modes  Command/Response (Software based timing) Program initiates an input request LabJack measures a single sample Program reads the sample data value Easy to set up but slow sampling rate  Stream (Hardware based timing) Program initiates an input request LabJack hardware continuously samples the input Program reads an entire block of sample data Complicated to set up but fast sampling rate

15 14 Analog Output The DAC can generate an output voltage with a specified amplitude (within limits). The output filter limits the output sampling rate to approximately 16 Hz. Output Range DAC: +0.04 V to +4.95 V DACx GND Output Ground

16 15 Timer & Counter The timer is for applications that require accurate hardware-based timing. A counter accumulates the number of falling edges (H- to-L signal transition) detected on an FIO. Timer FIO 123 Counter (32-bit register) 00000000000000000000000000000011 = 3 10 FIO This keeps track of the number of times an event has occurred. In PWM mode, the timer generates a pulse width modulated output signal.

17 16 Summary Screw Terminals FIO (8: FIO0-FIO7) Digital input (-10 V to +10 V) Digital output (L: 0 V, H: +3.3 V) Analog input (-10 V to +10 V) [Usable range: 0 V to +2.44 V] Timer / Counter DAC (2: DAC0-DAC1) Analog output (0 V to +4.95 V) VS (6) Fixed DC voltage (+5 V) GND (5) Ground reference (0 V) DB15 Port EIO (8: EIO0-EIO7) Digital input (-6 V to +6 V) Digital output (L: 0 V, H: +3.3 V) Analog input (-6 V to +6 V) [Usable range: 0 V to +2.44 V] Timer / Counter CIO (4: CIO0-CIO3) Digital input (-6 V to +6 V) Digital output (L: 0 V, H: +3.3 V) VS (1) Fixed DC voltage (+5 V) GND (2) Ground reference (0 V) Warnings Do not exceed rated voltage limits for inputs. Never apply an external voltage into an output. Do not short-circuit the LabJack. Do not overtighten screw terminals.

18 17 REFERENCE: I/O Specifications The following tables contain more detailed specifications for the LabJack's hardware. VS ParameterConditionsMinTypMaxUnits Output VoltageSelf-Powered4.755.05.25V Bus-Powered4.05.05.25V Maximum CurrentSelf-Powered450mA Bus-Powered50mA

19 18 Digital I/O ParameterConditionsMinTypMaxUnits Low Level Input Voltage-0.30.8V High Level Input Voltage25.8V Maximum Input VoltageFIO-1010V EIO/CIO-66V Output Low VoltageNo Load0V FIOSinking 1 mA0.55V EIO/CIOSinking 1 mA0.18V EIO/CIOSinking 5 mA0.9V Output High VoltageNo Load3.3V FIOSourcing 1 mA2.75V EIO/CIOSourcing 1 mA3.12V EIO/CIOSourcing 5 mA2.4V Short Circuit CurrentFIO6mA EIO/CIO18mA Output ImpedanceFIO550Ω EIO/CIO180Ω

20 19 Analog Input Parameter ConditionsMinTypMaxUnits Typical Input RangeSingle-Ended, LV02.44V Differential, LV-2.442.44V Special, LV03.6V Max AIN Voltage to GNDValid Readings, LV-0.33.6V Max AIN Voltage to GNDNo Damage, FIO-1010V No Damage, EIO-66V Resolution12bits Integral Linearity Error±0.05% FS Differential Linearity Error±1 counts Effective Resolution ( RMS )QuickSample Off>12bits Noise-free ResolutionQuickSample Off11.0bits Single-Ended, LV1.2mV Diff., Special, LV2.4mV Input ImpedanceLV40MΩMΩ Source ImpedanceLongSettling Off, LV10kΩkΩ LongSettling On, LV200kΩkΩ

21 20 Analog Output Parameter ConditionsMinTypMaxUnits Nominal Output RangeNo Load0.044.95V @ ±2.5 mA0.2254.775V Slew Rate0.4V/ms Resolution20bits Absolute Accuracy5% to 95% FS±5.0% FS Short Circuit CurrentMax to GND45mA Source Impedance50Ω Output frequencySinusoidal16Hz

22 21 Timer & Counter Modes Allowed channels: FIO4-FIO7, EIO0-EIO3 ModeDescriptionModeDescription 016-bit PWM output7Frequency output 18-bit PWM output8Quadrature input 2Period input (32-bit, rising edges)9Timer stop input (odd timers only) 3Period input (32-bit, falling edges)10System timer low read (default) 4Duty cycle input11System timer high read 5Firmware counter input12Period input (16-bit, rising edges) 6Firmware counter input (debounced)13Period input (16-bit, falling edges)


Download ppt "ECE 102 Engineering Computation Chapter 9 LabJack Introduction Dr. Herbert G. Mayer, PSU Status 10/2/2015 For use at CCUT Fall 2015."

Similar presentations


Ads by Google