1. 5/7/2010
Digital Cartesian Feedback Linearization of Switched Mode Power Amplifiers
Alejandro Viteri, Amir Zjajo, Thijmen Hamoen, Nick van der Meijs
Delft University of Technology

2. Outline Motivation Linearization by means of feedback
5/7/2010
Outline
Motivation
Linearization by means of feedback
Cartesian feedback modeling
Digital design
Simulation results
FPGA synthesis & results
Conclusions

3. Motivation Previous version of the transceiver
5/7/2010
Motivation
Previous version of the transceiver
A linear mode power amplifier (PA)
ISIS Innovative Solutions In Space
New version of the transceiver
A power efficient switch mode PA in the transmitter
No power losses due to dissipation
Improves lifetime of batteries
Better use of the solar panels
Non-linear

4. Linearization by means of feedback
5/7/2010
Linearization by means of feedback
Feedback system with distortion
In a feedback system linearity depends on the loop gain
Distortion in the feedback is not attenuated
Better control of the system linearity is achieved
Loop gain:

5. Cartesian feedback General model
5/7/2010
Cartesian feedback
General model
The signal is decomposed in Cartesian components
Feedback is applied to each component
A delay (e-Ts ) will model the latency of the digital domain
Stability condition (PM ≥ 60o)

6. Cartesian feedback Phase shift problem Sources of phase shift
5/7/2010
Cartesian feedback
Phase shift problem
Sources of phase shift
Delays in the loop
Distortion in the PA and
Up/Down converters
To changes and aging

7. Cartesian feedback Mixed signal model Benefits Allows integration
5/7/2010
Cartesian feedback
Mixed signal model
Benefits
Allows integration
Reduces area usage and weight in the satellite
Low power consumption
The dominant poles of this system determine the stability
Oversampling allows to relax the order of the LPFs

8. Mixed-signal Cartesian feedback
5/7/2010
Mixed-signal Cartesian feedback
Stability analysis by root locus
System root locus
Compensated system root locus

9. Mixed-signal Cartesian feedback
5/7/2010
Mixed-signal Cartesian feedback
Phase regulation
Source signals modeled as a ramp signal
Transfer function of phase error

10. Mixed-signal Cartesian feedback
5/7/2010
Mixed-signal Cartesian feedback
Phase regulation
Final value theorem:

11. Mixed-signal Cartesian feedback
5/7/2010
Mixed-signal Cartesian feedback
Phase regulation

12. Digital design Delay correction by signal rotation
5/7/2010
Digital design
Delay correction by signal rotation
Magnitude signal for envelope restoration

13. 5/7/2010
Architecture

14. Simulation results Amplification of 20 dB IMD -40 dBc satisfied
5/7/2010
Simulation results
Amplification of 20 dB
IMD -40 dBc satisfied

15. FPGA synthesis Spartan3 X3s50-4tq144 50K System gates
5/7/2010
FPGA synthesis
Logic
Utilization
Used/Available %
4 input LUTs
428/1536
27%
MULT18x18
2/4
50%
I/O Blocks
87/97
89%
Spartan3 X3s50-4tq144
50K System gates
1536 equivalent logic cells

16. Results Item Value Units Bandwidth 9.6 kHz Loop Gain 10 System delay
5/7/2010
Results
Item
Value
Units
Bandwidth
9.6
kHz
Loop Gain 10
System delay
400 ns
Bit length 12
bits
Clk freq.
83.33
MHz
Clk cycles 15
Latency
180
Slack
220
Area 27 %
Power
33.31 † mW
Power budget 1.7 W
33.31 mW in a FPGA
1.96% of the total power budget
Latency of 180 ns
Slack of 220 ns for A/D and D/A
† Xilinx Xpower Analyzer

17. 5/7/2010
Conclusions
Mixed-signal Cartesian feedback proves to be an efficient linearization method for a stable system with sufficient phase margin.
Feedback improves linearity when provided with an adequate amount of loop gain.
The results show that the use of the CORDIC algorithm proves to be a simple, low-power and robust solution for the low bandwidth input signal.

18. 5/7/2010
THANK YOU