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Models of Hierarchical Memory. Two-Level Memory Hierarchy Problem starts out on disk Solution is to be written to disk Cost of an algorithm is the number.

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Presentation on theme: "Models of Hierarchical Memory. Two-Level Memory Hierarchy Problem starts out on disk Solution is to be written to disk Cost of an algorithm is the number."— Presentation transcript:

1 Models of Hierarchical Memory

2 Two-Level Memory Hierarchy Problem starts out on disk Solution is to be written to disk Cost of an algorithm is the number of input and output operations. Individual items may be blocked into blocks of size B

3 Parallel Disk Subsystems Unrestricted Parallel Model Items are blocked on the disk, with B items per block Any D blocks can be read or written simultaneously in one I/O [Aggarwal, Vitter 1987]

4 Parallel Disk Subsystems: Parallel Disk Model [Vitter, Shriver 1990] D blocks can be read or written simultaneously, but only if they reside on distinct disks More realistic than the unrestricted parallel model Still not entirely realistic, since the CPU may now become the bottleneck if D is large enough.

5 Parallel Memory Hierarchies 12… H H hierarchies of the same type (with H CPUs) are connected by a “network” The network can do sorting deterministically in log H time

6 P Processors/D Disks The number of disks D can be either more than, the same as, or less than the number of processors.

7 Multilevel Memory Hierarchies: Hierarchical Memory Model (HMM) [Aggarwal, Alpern, Chandra, Snir 1987] Access to memory location x takes time f(x) f is a non-decreasing function such that there exists a constant c such that f(2x) ≤ cf(x) for all x

8 Multilevel Memory Hierarchies: Block Transfer Model (BT) [Aggarwal, Chandra, Snir 1987] Access to memory location x takes time f(x) Once an access has been made, additional items can be “injected” at a cost of one per item

9 Multilevel Memory Hierarchies: Uniform Memory Hierarchies (UMH) [Alpern, Carter, Feig 1990] bandwidth b (l )  blocks each of size  ll There is a hierarchy of exponential-sized memory modules Each bus has a bandwidth associated with it All the buses can be active simultaneously

10 Parallel Memory Hierarchies: Results P-HMM f(x) = log x f(x) = x Algorithm is uniformly optimal for any cost function P-BT f(x) = log x f(x) = x, 0 <  < 1 f(x) = x,  = 1 f(x) = x,  > 1     These results use a modified Balance Sort for deterministic upper bounds [Vitter, Shriver 1990]

11 Parallel Memory Hierarchies: More Results P-UMH b(l) =1 b(l) = 1  (l+1) b(l) =  P-RUMH As above except tight lower bound for b(l) = 1/(l+1) P-SUMH b(l) =1 b(l) = 1  (l+1) b(l) =  -cl These results use a modified Balance Sort for deterministic upper bounds -cl


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