1. Boolean Algebra & Logic Circuits Dr. Ahmed El-Bialy Dr. Sahar Fawzy

2. Binary Logic Binary logic deals with binary variables that take on two discrete values and with the operations of mathematical logic applied to these variables. Binary logic deals with binary variables that take on two discrete values and with the operations of mathematical logic applied to these variables.

3. Logic Gates

4. Truth Table   A truth table is a table of combinations of the binary variables showing the relationship between the values that the variables take on and the values of the result of the operation   If there are n inputs, there will be 2 n rows in the table

5.  Represented by a dot (. ) or by the absence of an operator AND Operation  The definition of logical (.) is: 0 0 = 0 0 1 = 0 1 0 = 0 1 1 = 1 A B C  It looks like multiplication, but it is not. Therefore symbol is used for AND instead of a dot.

6. OR Operation  Represented by a plus (+)  The definition of logical (+) is: 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 1  It looks like addition, but it is not. Therefore symbol is used for OR instead of a plus. A B C

7. Not (Complement) Operation  Represented by a bar over the variable or a prime (’)  The definition of logical ( ’ ) is: 0’ = 1 1’ = 0 If X = 1 then X’ = 0 If X = 0 then X’ = 1 X X’

8.  NAND: the complement of the AND operation ABC =( A B)’ 001 011 101 110 A B C  NOR: the complement of the OR operation A B C

9.  XOR: exclusive OR is represented by  Its definition logic is: 0  0 = 0 0  1 = 1 1  0 = 1 1  1 = 0 A B C = A  B =AB’+A’B AB A  B 000 011 101 11 0  XNOR: exclusive-NOR is the complement of the exclusive-OR and expressed as: (A  B)’=AB+A’B’

10.  Exclusive-OR Theorem: X  0 = X X  1 = X' X  X = 0X  X' = 1 X  Y = Y  X ( X  Y)  Z = X  ( Y  Z ) = X  Y  Z ( X  Y)' = X  Y' = X'  Y  Odd function: multiple-variable exclusive-OR operation : is one whenever the corresponding binary truth-table values have an odd number of 1’s.

11. Boolean Expression  Boolean expressions are made up of variables combined by Logical operations.  Examples: [ A B ( C + B’ ) + D] B E C’  Literals each instance of a variable This expression has 4 variables and 10 literals: a’bd + bcd + ac’ + a’d’

12. Evaluation of Boolean Expression  Boolean expressions can be represented in a truth table which lists all possible combinations of the values of all variables in the expression. F = A’ + B C

13. Boolean Expression  Boolean expressions can be transformed from an algebraic expression into a circuit diagram composed of logic gates. F = A’ + B C

14. Boolean Expression F = X + Y ( X’ +Y’) X+Y(X'+Y')Y(X'+Y')X'+Y'Y'X'YX 0011100 1110110 1011001 1000011 X Y X ’ +Y ’ Y(X ’ +Y ’ ) X+Y(X'+Y') X+Y 0 1 1 1 But  We used 5 gates Only one gate

15. Basic Boolean Algebra Theorems 1. 1.X+0=X 2. 2.X+1=1 3. 3.X+X=X 4. 4.X+X’=1 5.X 1=X 6.X 0=0 7.X X=X 8.X X’=0 Associative Law: 12.(X + Y) + Z = X + (Y + Z) = X + Y + Z 13.( X Y ) Z = X ( Y Z) = X Y Z Distributive Law: 14.X ( Y + Z ) = X Y + X Z 15.X+ X Y= X 16.X ( X + Y) = X 17.(X + Y)(X+Z) = X+ ZY 18.X + X’ Y = X+Y 19.XY + YZ + Y’Z =XY+Z 9.(X ’ ) ’ =X Commutative Law: 10.X Y = Y X 11.X + Y = Y + X

16. Basic Boolean Algebra Theorems Other Distributive Law: X + Y Z = ( X + Y ) ( X + Z ) X + Y Z = ( X + Y ) ( X + Z )Proof: Simplification Theorems X Y + X Y’ = X( X + Y ) (X + Y’ ) = X X + X Y = XX ( X + Y ) = X ( X + Y’ ) Y = X YX Y’ + Y = X + Y

17. Basic Boolean Algebra Theorems DeMorgan ’ s Law: ( X + Y ) ’ = X ’ Y ’ ( X Y ) ’ = X ’ + Y ’ ( X + Y ) ’ = X ’ Y ’ ( X Y ) ’ = X ’ + Y ’Proof: DeMorgan’s Law- one step rule: [ f ( X 1, X 2, … X N, 0, 1, +, ) ]’ = f ( X 1 ’, X 2 ’, … X N ’, 1, 0,, +)  Replace all variables with the inverse  Replace + with and with +  Replace 0 with 1 and 1 with 0  Be careful of hierarchy ( )

18. Methods of Boolean Expression Simplification Combine terms Eliminate terms Eliminate literals Add redundant terms if needed A’B + A’B’C’D’ + ABCD’ A’( B + B’C’D’) + ABCD’ A’( B + C’D’) + ABCD’ A’B + A’C’D’ + ABCD’ A’C’D’ + B( A’ +ACD’) A’C’D’ + B( A’ +CD’) A’B + BCD’ + A’C’D’

19. Standard Forms  Product term : (e.g., XYZ) (Minterms )  Sum term :(e.g., X+Y+Z) (Maxterms) They do not imply arithmetic operations in Boolean algebra; instead, they specify the logical operation AND and OR, respectively

20. X Y Z MinMintermsMaxMaxterms 0 0 0 m0 X’Y’Z’X’Y’Z’X’Y’Z’X’Y’Z’M0X+Y+Z 0 0 1 m1 X’Y’ZX’Y’ZX’Y’ZX’Y’ZM1 X+Y+Z ’ 0 1 0 m2 X ’ YZ ’ M2 X+Y ’ +Z 0 1 1 m3 X ’ YZ M3 X+Y ’ +Z ’ 1 0 0 m4 XY ’ Z ’ M4 X ’ +Y+Z 1 0 1 m5 XY ’ Z M5 X ’ +Y+Z ’ 1 1 0 m6 XYZ ’ M6 X ’ +Y ’ +Z 1 1 1 m7XYZM7 X ’ +Y ’ +Z ’

21. A Boolean function F is equal to 1 for each of the following binary combinations of the variables X, Y, and Z: 000, 001,100, 110. Derive its algebraic expression Example 1: (Sum of Product SoP)

22. Truth table and logic sum of minterms X Y Z MinMintermsF 0 0 0 m0 X’Y’Z’X’Y’Z’X’Y’Z’X’Y’Z’1 0 0 1 m1 X’Y’ZX’Y’ZX’Y’ZX’Y’Z1 0 1 0 m2 X ’ YZ ’ 0 0 1 1 m3 X ’ YZ 0 1 0 0 m4 XY ’ Z ’ 1 1 0 1 m5 XY ’ Z 0 1 1 0 m6 XYZ ’ 1 1 1 1 m7XYZ0 Sum-of-Product Boolean expressions for F: F = m 0 +m 1 +m 4 +m 6 =X’Y’Z’+X’Y’Z+XY’Z’+XYZ’

23. Example 2: (Sum of Product SoP) Design a gate network with the following rules: 1. It has three inputs and one output 2. The output is one when a) All inputs are zero’s b) The 3 rd is zero & 1 st, 2 nd are ones c) The 3 rd is one & 1 st, 2 nd are zeros d) All inputs are one’s

24. X Y Z MinMintermsF 0 0 0 m0 X’Y’Z’X’Y’Z’X’Y’Z’X’Y’Z’1 0 0 1 m1 X’Y’ZX’Y’ZX’Y’ZX’Y’Z0 0 1 0 m2 X ’ YZ ’ 0 0 1 1 m3 X ’ YZ 1 1 0 0 m4 XY ’ Z ’ 1 1 0 1 m5 XY ’ Z 0 1 1 0 m6 XYZ ’ 0 1 1 1 m7XYZ1 Sum-of-Product Boolean expressions for F: S = m 0 +m 3 +m 4 +m 7 =X’Y’Z’+X’YZ+XY’Z’+XYZ

25. Example 3: Design a gate network with the following rules: 1. It has Two inputs and Two outputs 2. The outputs S & C are: a) If the two inputs are zero’s the two outputs are zeros b) If one of the inputs is one the S output is one and the C is zero c) If the two inputs are one’s the S output is zero the C is one

26. Sum-of-Product Boolean expressions Sum-of-Product Boolean expressions S =X’Y+XY’  XOR S =X’Y+XY’  XOR C =XY  AND C =XY  AND Half Adder

27. 0011 0101 S0110 C0001 + +++

28. Design a gate network with the following specs: It has three inputs (A, B, Ci) and two outputs (S, C) 1. The outputs S & C are: a) If the only one input is 1  S=1 C=0 b) If two of the inputs are 1  S=0 C=1 c) If all of the three inputs are 1  S=1 C=1 Example 4

29. S=A’B’C + AB’C’+ABC+A’BC’ C= A’BC+AB’C+ABC+ABC’

30. Map Simplification  Karnaugh map: a diagram made up of squares, with each square representing one minterm of the function.  be done systematically  Simpler to find the minimum solution  Two variables K-map: A B 01 0 1 A=O, B=0 A=O, B=1 A=1, B=0 A=1, B=1

31. Map Simplification ABF 001 011 100 110 F = A’B’ + A’B F = A’ A B 01 0 1 1 1 0 0 1 1 A = 0 B = 0 or 1 0 0 1 1  Example of a two-variable K-map:

32. Map Simplification  Three variables K-map: The order of BC variables are 00, 01, 11 and 10. They are Gray code (i.e. only one bit is changed each time). A B C 0 1 001110 01 m0m0 m1m1 m3m3 m2m2 m4m4 m5m5 m7m7 m6m6  Each minterm corresponds to a location on K-map: m 0 …m 7

33.  Example of a three-variable K-map: Map Simplification F (A,B,C) =  m ( 2, 3, 5, 7 ) 111 1 11 11 11 A B C 0 1 001110 01 00 001 11 1 ABCF 0000 0010 0101 0111 1000 1011 1100 1111

34. A B C 0 1 001110 01 00 001 11 1 Map Simplification A = 0, B = 1, C= don’t care(0 or 1) F = A’B C = 1, B = 1, A= don’t care A = 1, C = 1, B= don’t care F = A’B+CB +AC

35. Map Simplification AB CD 001110 01 m0m0 m1m1 m3m3 m2m2 m4m4 m5m5 m7m7 m6m6 00 11 10 01 m 12 m 13 m 15 m 14 m8m8 m9m9 m 11 m 10  Four variables K-map : - Note that the orders of AB and CD follow Gray code.  Each minterm corresponds to a location on K-map: m 0 …m 15

36.  Example of a four-variable K-map: Map Simplification Simplify function F =  m ( 1, 2, 3, 5, 7, 10, 14, 15 ) AB CD 001110 01 00 11 10 01 0 00 00 000 111 11 11 1 F =A’DF =A’D+A’B’CF =A’D+A’B’C+ABC F =A’D+A’B’C+ABC+ ACD’ or B’CD’

37.  K-Map with “Don’t Care” Values : - “Don’t care conditions” means unspecified minterms of a function, which is marked with “X” Map Simplification F (A,B,C,D) =  m ( 1, 5, 6, 10, 11, 14 ) +  d ( 0, 7, 9, 15 ) = AC + BC + A’C’D AB CD 0011 01 00 11 10 01 X 01 00 0X1 100 1X X1 1 10

38. Thank you see you in Combinational Circuits