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SOLUTION TO module 3.3. Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 112 Example 7.2 Fault A sa0 Step 1 – D-Drive – Set A = 1 D 1 D.

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Presentation on theme: "SOLUTION TO module 3.3. Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 112 Example 7.2 Fault A sa0 Step 1 – D-Drive – Set A = 1 D 1 D."— Presentation transcript:

1 SOLUTION TO module 3.3

2 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 112 Example 7.2 Fault A sa0 Step 1 – D-Drive – Set A = 1 D 1 D

3 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 113 Step 2 -- Example 7.2 D 1 0 D Step 2 – D-Drive – Set f = 0 D

4 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 114 Step 3 -- Example 7.2 D 1 0 D Step 3 – D-Drive – Set k = 1 D 1 D

5 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 115 Step 4 -- Example 7.2 D 1 0 D Step 4 – Consistency – Set g = 1 D 1 D 1

6 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 116 Step 5 -- Example 7.2 D 1 0 D Step 5 – Consistency – f = 0 Already set D 1 D 1

7 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 117 Step 6 -- Example 7.2 D 1 0 D Step 6 – Consistency – Set c = 0, Set e = 0 D 1 D 1 0 0

8 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 118 D-Chain Dies -- Example 7.2 D 1 0 X D Step 7 – Consistency – Set B = 0 D-Chain dies D 1 D 1 0 0 0 n Test cube: A, B, C, D, e, f, g, h, k, L

9 Self assesmenet

10 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1110 Example 7.3 – Step 2 s sa1 Propagation D-cube for v 1 D 0 sa1 D 1 D

11 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1111 Example 7.3 – Step 2 s sa1 Forward & Backward Implications 1 D sa1 0 D D 1 1 0 1 1

12 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1112 Example 7.3 – Step 3 s sa1 Propagation D-cube for Z – test found! 1 D sa1 0 D D 1 1 0 1 1 1 D

13 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1113 Example 7.3 – Fault u sa1 Primitive D-cube of Failure 1 D 0 sa1

14 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1114 Example 7.3 – Step 2 u sa1 Propagation D-cube for v 1 D 0 sa1 D 0

15 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1115 Example 7.3 – Step 2 u sa1 Forward and backward implications 1 D 0 sa1 D 0 0 1 0 1 0

16 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1116 Inconsistent d = 0 and m = 1 cannot justify r = 1 (equivalence) – Backtrack – Remove B = 0 assignment

17 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1117 Example 7.3 – Backtrack Need alternate propagation D-cube for v 1 sa1 D 0

18 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1118 Example 7.3 – Step 3 u sa1 Propagation D-cube for v 1 sa1 D 0 1 D

19 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1119 Example 7.3 – Step 4 u sa1 Propagation D-cube for Z D 1 sa1 D 0 1 D 1 1

20 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1120 Example 7.3 – Step 4 u sa1 Propagation D-cube for Z and implications D 1 sa1 D 0 1 D 1 1 0 0 0 1 1

21 PODEM

22 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1122 Select path s – Y for fault propagation sa1 Example 7.3 Again

23 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1123 Initial objective: Set r to 1 to sensitize fault 1 sa1 Example 7.3 -- Step 2 s sa1

24 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1124 Example 7.3 -- Step 3 s sa1 Backtrace from r 1 sa1

25 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1125 Example 7.3 -- Step 4 s sa1 Set A = 0 in implication stack 1 0 sa1

26 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1126 Example 7.3 -- Step 5 s sa1 Forward implications: d = 0, X = 1 1 sa1 0 0 1

27 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1127 Example 7.3 -- Step 6 s sa1 Initial objective: set r to 1 1 sa1 0 0 1

28 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1128 Example 7.3 -- Step 7 s sa1 Backtrace from r again 1 sa1 0 0 1

29 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1129 Example 7.3 -- Step 8 s sa1 Set B to 1. Implications in stack: A = 0, B = 1 1 sa1 0 0 1 1

30 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1130 D Example 7.3 -- Step 9 s sa1 Forward implications: k = 1, m = 0, r = 1, q = 1, Y = 1, s = D, u = D, v = D, Z = 1 1 sa1 1 0 1 1 D D 1 0 1 0 1

31 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1131 Backtrack -- Step 10 s sa1 X-PATH-CHECK shows paths s – Y and s – u – v – Z blocked (D-frontier disappeared) 1 sa1 0 0 1

32 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1132 Step 11 -- s sa1 Set B = 0 (alternate assignment) 1 sa1 0 0

33 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1133 Backtrack -- s sa1 1 sa1 0 0 1 0 1 0 1 0 1 0 1 Forward implications: d = 0, X = 1, m = 1, r = 0, s = 1, q = 0, Y = 1, v = 0, Z = 1. Fault not sensitized.

34 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1134 Step 13 -- s sa1 Set A = 1 (alternate assignment) 1 sa1 1

35 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1135 Step 14 -- s sa1 Backtrace from r again 1 sa1 1

36 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1136 Step 15 -- s sa1 Set B = 0. Implications in stack: A = 1, B = 0 1 sa1 1 0

37 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1137 Backtrack -- s sa1 Forward implications: d = 0, X = 1, m = 1, r = 0. Conflict: fault not sensitized. Backtrack sa1 1 0 0 0 1 1 1 1 1 0 0 1

38 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1138 Step 17 -- s sa1 Set B = 1 (alternate assignment) 1 sa1 1 1

39 Feb.. 16, 2001VLSI Test: Bushnell-Agrawal/Lecture 1139 Fault Tested -- Step 18 s sa1 Forward implications: d = 1, m = 1, r = 1, q = 0, s = D, v = D, X = 0, Y = D 1 sa1 1 1 1 1 0 D 0 D D X D

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