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2. Adaptive System Identification Configuration[2] The adaptive system identification is primarily responsible for determining a discrete estimation of the transfer function for an unknown digital or analog system(u(n)). The same input x(n) is applied to both the adaptive filter and the unknown system from which the outputs are compared. 2

3. 3 Coefficient Adaptation The principal behind determining the coefficients of the filter model is to maximize the statistical correlation between the desired signal and the coefficients. Typically, this is done by minimizing the correlation between the error signal and the filter state as is relevant to the coefficients. If the adaptive filter is working, the error signal decreases in magnitude, which slows down the movement of the coefficients. The filter is therefore converging to a solution.

4. LMS Algorithm[3] For each sample, the LMS algorithm: Filters the input using b i Updates the b i coefficients.

5. LMS Algorithm at Each Sample Time FIR Filtering equation:  Coefficient updating equation:

6. BASIC PRINCIPLE OF FIR FILTER BASED ON DA ALGORITHM A discrete-time linear FIR filter can be expressed as a mathematical expression: y[n] is output, x[n] are input samples, h k is the filter weight, K is the order of the digital filter. This system requires K multiplications and addition operations and this occupy a large number of chip resources of FPGA, when the resources on the chip are limited To solve this problem Distributed algorithm (DA) is more prominent than other alternative solutions. 6

7. FIR Filter DA (Distributed Arithmetic) Implementation (cont’d) y = ∑ c[n] ∑ x b [k] ∙ 2 b = c[0] (x B-1 [0]2 B-1 + x B-2 [0] 2 B-2 + … + x 0 [0]2 0 ) + c[1] (x B-1 [1] 2 B-1 + x B-2 [1] 2 B-2 + … + x 0 [1] 2 0 ) + … + c[N-1] (x B-1 [N-1] 2 B-1 + x B-2 [0] 2 B-2 + … + x 0 [N-1] 2 0 ) = (c[0] x B-1 [0] + c[1] x B-1 [1] + … + c[N-1] x B-1 [N-1]) 2 B-1 +(c[0] x B-1 [0] + c[1] x B-2 [1] + … + c[N-1] x B-2 [N-1]) 2 B-2 + … + (c[0] x 0 [0] + c[1] x 0 [1] + … + c[N-1] x 0 [N-1]) 2 0 = ∑ 2 b ∑ c[n] ∙ x b [k] where n=0, 1, …, N-1 and b=0, 1, …, B-1

8. BASIC PRINCIPLE OF FIR FILTER BASED ON DA ALGORITHM [3] operations to alternative multiplication operations. m k0 is the sign bit, m kl are data bits The weight adaptation in a LMS adaptive filter is given by: 8

9. The way to inquire DA-F-LUT[1][4] 9

10. LMS Algorithm[3] Minimize the power of the error signal General steepest-descent for filter coefficient and since, we have where 10

11. In the one-dimensional case 11

12. Variants of the LMS Algorithm[2] To reduce implementation complexity, variants are taking the sign of e(n) and/or LMS - sign-data LMS - Sign-error LMS - Sign-sign LMS - p However, the sign data and sign-sign data algorithms may not converge! 12

13. UPDATE PROGRAM OF DA-F-LUT In this paper, a novel adaptation scheme for updating the DA- F-LUT is presented. The proposed method in this paper directly uses LMS algorithm to update the DA-F-LUT contents 13

14. proposed DA Adaptive Filter System[1] 14

15. Algorithm of DA Adaptive Filter[5] 15

16. time domain input/output curve based on QE-LMS algorithm[1] 16

17. CONCLUSION This paper simulated filter using look-up table method using MAC method. Both of the software environment are QuartusII 6.0, devices are Cyclone EP1C3T144C8. The LUT method only occupies 1% of memory resources and 9% of logic resources; Although the MAC method does not occupy storage resources, but occupies 44% of the chip logic resources DA algorithm is suitable for hardware implementation, it can greatly reduce hardware resources consumption 17

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19. REFERENCES [1] Z. Bo, T. Xiuwei Design of a Novel Adaptive FIR Filter Based on FPGA. IEEE ICEMI Magazine 2011,4:624-628. [2] PARHI K K ˊ A systematic approach for design of digit-serial signal processing architectures[J] ˊ IEEE J Solid-State Circ 1992,27:29-43 ˊ [3] WHITE S A ˊ Application of distributed arithmetic to digit signals processing: A tutorial review[J] ˊ IEEE ASSP Magazine ˈ 1989 ˈ 6:4-19 ˊ [4] ALLRED D J, YOO H. LMS adaptive filter using distributed arithmetic for high throughput[J]. IEEE Regular Papers, 2005,52(7): 1327-1337. [5] ALLRED D J, YOO H. A novel high performance distributed arithmetic adaptive filter implementation on an FPGA[J]. Acoustic,Speech,and Signal Processing,2004, 5: 161-164. 19