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SMALL IDENTIFIERS FOR CHARE ARRAY ELEMENTS With contributions from Akhil Langer, Harshitha Menon, Bilge Acun, Ramprasad Venkataraman, and L.V. Kalé Phil.

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Presentation on theme: "SMALL IDENTIFIERS FOR CHARE ARRAY ELEMENTS With contributions from Akhil Langer, Harshitha Menon, Bilge Acun, Ramprasad Venkataraman, and L.V. Kalé Phil."— Presentation transcript:

1 SMALL IDENTIFIERS FOR CHARE ARRAY ELEMENTS With contributions from Akhil Langer, Harshitha Menon, Bilge Acun, Ramprasad Venkataraman, and L.V. Kalé Phil Miller

2 Array Element Location Management  Enables process virtualization  Directs messages from sender PE to host PE  Maps element identifier to object pointer on host PE  Processes element instantiation & deletion  Placement at creation  On-demand creation  Detects duplicate insertion

3 Array Element Location Management  Hooks for RTS introspection and adaptivity  Tracing  Load instrumentation  Migration  Fault tolerance

4 Array Index Structure  Fixed 16 bytes  No less, even for small/simple arrays  No more, even for sophisticated arrays

5 Home PE  Track assigned elements  Existence  Current host PE  Default host PE  Tell other PEs as necessary  Assigned by Array Map

6 Static Array Maps  Array Index to Home PE  Simple strategies  Block  Round-robin (cyclic)  File  Application-specific  OpenAtom  CharmLU

7 Pushing the Envelope  Array message variant takes 34-38 bytes  Next largest only needs 18 bytes  Could save 16-20 bytes on every message!

8 Goals of a shorter ID  Reduce envelope size  Shrink memory footprint  Improve fine-grain performance  Enable future index evolution

9 Design parameters  Preserve API:  Send messages by index  Maps and home PEs  Avoid extra communication  Maintain or improve performance

10 Scheme  64 Bits

11 Protocol  Home PE generates ID at construction  Simple counter in element field  Async request if constructing elsewhere  ID requests piggy-back on location requests  Extra messages only for unusual construction

12 Potential Optimizations  PE-level caching & pointer lookups  Index compression instead of lookups

13 Index Compression  Many arrays fit directly within 48-bit space  All 1D with 32-bit ‘int’  2D < (16M) 2  Etc.  Specify bounds, RTS will bit-pack if they fit  Could also enable hashing  Collisions would be disastrous  Known indices and perfect hashing?

14 Summary  Current Status  Implemented, passing all tests  Performance Comparable in coarse-grain apps Slightly slower in fine-grain  Future Direction: arbitrary index types  AMR, tree codes


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