1. CMPUT 329 - Computer Organization and Architecture II1 CMPUT329 - Fall 2002 Topic2: DeMorgan Laws José Nelson Amaral

2. CMPUT 329 - Computer Organization and Architecture II2 Reading Assignment Chapter 4: Sections 4.1.4, 4.1.5, 4.1.6, 4.2, 4.3.1, 4.3.2

3. CMPUT 329 - Computer Organization and Architecture II3 First DeMorgan’s Law The complement of the sum is equal the product of the complements. (X+Y)’ = X’Y’ XYXY Z Z Y X 

4. CMPUT 329 - Computer Organization and Architecture II4 First DeMorgan’s Law The complement of the sum is equal the product of the complements. (X+Y)’ = X’Y’ XYXY Z Z Y X 

5. CMPUT 329 - Computer Organization and Architecture II5 First DeMorgan’s Law The complement of the sum is equal the product of the complements. (X+Y)’ = X’Y’ XYXY Z Z Y X 

6. CMPUT 329 - Computer Organization and Architecture II6 First DeMorgan’s Law The complement of the sum is equal the product of the complements. (X+Y)’ = X’Y’ XYXY Z Z Y X 

7. CMPUT 329 - Computer Organization and Architecture II7 First DeMorgan’s Law The complement of the sum is equal the product of the complements. (X+Y)’ = X’Y’ XYXY Z Z Y X 

8. CMPUT 329 - Computer Organization and Architecture II8 Second DeMorgan’s Law The complement of the product is equal the sum of the complements. (XY)’ = X’ + Y’ Z XYXY Z Y X 

9. CMPUT 329 - Computer Organization and Architecture II9 NOR and NAND Because these combination of gates are used often, there are special symbols to represent them: XYXY Z XYXY Z Z XYXY XYXY Z  

10. CMPUT 329 - Computer Organization and Architecture II10 DeMorgan’s Law (cont.) The De Morgan’s laws generalize to n variables: (X 1 + X 2 + X 3 + ··· + X n )’ = X 1 ’X 2 ’X 3 ’ ··· X n ’ (X 1 X 2 X 3 ··· X n )’ = X 1 ’ + X 2 ’ + X 3 ’ + ··· + X n ’

11. CMPUT 329 - Computer Organization and Architecture II11 DeMorgan’s Law (example) Express the complement f’(w,x,y,z) of the following expression in a simplified form. f(w,x,y,z) = wx(y’z + yz’) f’(w,x,y,z) = w’ + x’ + (y’z +yz’)’ = w’ + x’ + (y’z)’(yz’)’ = w’ + x’ + (y + z’)(y’ + z) = w’ + x’ + yy’ + yz + z’y’ + z’z = w’ + x’ + 0 + yz + z’y’ + 0 = w’ + x’ + yz + y’z’

12. CMPUT 329 - Computer Organization and Architecture II12 Exclusive OR X  Y = XY’ + X’Y If X=1 OR Y=1, but not both of them, then C=1 XYXY C X  0 = X  1 = X  X = X  X’ = Commutative Law: X  Y = Y  X Associative Law: (X  Y)  Z= X  ( Y  Z) = X  Y  Z Distributive Law: X(Y  Z) = XY  XZ X X’ 0 1

13. CMPUT 329 - Computer Organization and Architecture II13 Exclusive-OR (cont.) Complement Law: (X  Y)’ = X  Y’ = X’  Y Algebraic Proof: (X  Y)’ = (XY’ + X’Y)’ = (XY’)’(X’Y)’ = (X’ + Y)(X + Y’) = X’X + X’Y’ + XY + YY’ = 0 + X’Y’ + XY + 0 = X’  Y = X’Y’ + XY = XY + X’Y’ = X  Y’

14. CMPUT 329 - Computer Organization and Architecture II14 In-place Value Permutation The following properties are valid: (X  Y)  Y = X (X  Y)  X= Y Algebraic: (X  Y)  Y = (XY’ + X’Y)Y’ + (XY’ + X’Y)’Y = XY’Y’ + X’YY’ + ((XY’)’(X’Y)’)Y = XY’ + 0 + ((X’+Y)(X+Y’))Y = XY’ + X’XY + X’Y’Y +XYY + YY’Y = XY’ + 0 + 0 + XY + 0 = X(Y’ + Y) = X1 = X

15. CMPUT 329 - Computer Organization and Architecture II15 Using In-place Value Permutation in Assembly Can be used in assembly programming to exchange the value of two registers in place: R1  R1  R2 R2  R1  R2 R1  R1  R2 The In-place Value Permutation Property of the exclusive-OR: (X  Y)  Y = X (X  Y)  X= Y If we do back substitution in the second and third operations, we will find out that (assuming R1=A and R2=B initially): R1  (A  B) R2  (A  B)  B = A R1  (A  B)  A = B Thus, if initially R1 = A and R2 = B, then after this sequence of operations, R1 = B and R2 = A.

16. CMPUT 329 - Computer Organization and Architecture II16 Equivalence Gate (X  Y) = XY + X’Y’ If X=Y then C=1, otherwise C=0 (X  Y) = (X  Y)’ XYXY C

17. CMPUT 329 - Computer Organization and Architecture II17 Positive and Negative Logic Positive Logic: the higher voltage (+V) represents 1 and the lower voltage (0V) represents 0 Negative Logic: the higher voltage (+V) represents 0 and the lower voltage (0V) represents 1

18. CMPUT 329 - Computer Organization and Architecture II18 Positive and Negative Logic (example) Logic Gate e2e2 e3e3 e1e1 eoeo The same physical circuit implements different logic functions. The function implemented depends on the logic used to interpret the inputs and outputs. Electric Voltages Positive Logic Negative Logic

19. CMPUT 329 - Computer Organization and Architecture II19 Duality Any theorem or identity in switching algebra remains true if 0 and 1 are swapped and and + are also swapped throughout. Example: X + X Y = X X X + Y = X (duality) X + Y = X (using idempotency) what is wrong? We must keep the operator precedence of the original expression, therefore: X + X Y = X X (X + Y) = X (duality)

20. CMPUT 329 - Computer Organization and Architecture II20 The Consensus Theorem XY + X’Z + YZ = XY + X’Z = XY + X’Z + (X + X’)YZ = XY + X’Z + XYZ + X’YZ = XY + XYZ + X’Z + X’YZ = XY(1 + Z) + X’Z(1 + Y) = XY·1 + X’Z·1 XY + X’Z + YZ = XY + X’Z + 1·YZ = XY + X’Z

21. CMPUT 329 - Computer Organization and Architecture II21 Sum-of-Products (Minterms) An expression is on a sum-of-products form if it is formed by the sum of products, and all the products are formed by single variables only. Examples: AB’ + CD’E + AC’E’ ABC’ + DEFG + H A + B’ + C + D’E The following expressions are not sum-of-products: (A+B)CD + EF (X + Y)(X + Z) Each of the products in the sum-of-products form is called a minterm. Thus the form is also called sum-of-minterms.

22. CMPUT 329 - Computer Organization and Architecture II22 Product-of-Sums (Maxterms) Similarly, a product-of-sums is formed by the product of sums in which all the sums are formed by single variables only. Examples: (A + B’)(C + D’ + E)(A + C’ + E’) (A + B)(C + D +E)F AB’C(D’ + E) The following expressions are not product-of-sums: (A+B)CD + EF A + B’ + C + D’E Each of the sums in the product-of-sums form is called a maxterm. Thus the form is also called product-of-maxterms.

23. CMPUT 329 - Computer Organization and Architecture II23 Building Practical Circuits Problem: Design a logical circuit to automatically operate a car alarm. The manual for the alarm gives the following explanation for its operation. “The alarm will go off if the alarm system is activated and any of the two doors or the trunk are open, or if the vibration sensor is activated and the key is not in the ignition.” “The alarm will go off if the alarm system is activated and any of the two doors or the trunk are open, or if the vibration sensor is activated and the key is not in the ignition.” AlarmActivated DriverDoorOpen PassengerDoorOpen TrunkOpen Vibration KeyInIgnition Inputs:

24. CMPUT 329 - Computer Organization and Architecture II24 Building Practical Circuits “The alarm will go off if the alarm system is activated and any of the two doors or the trunk are open, or if the vibration sensor is activated and the key is not in the ignition.” AlarmGoOff = AlarmActivated (DriverDoorOpen + PassengerDoorOpen + TrunkOpen) + Vibration (KeyInIgnition)’ AlarmActivated DriverDoorOpen PassengerDoorOpen TrunkOpen Vibration KeyInIgnition Inputs:

25. CMPUT 329 - Computer Organization and Architecture II25 Building Practical Circuits AlarmGoOff = AlarmActivated (DriverDoorOpen + PassengerDoorOpen + TrunkOpen) + Vibration (KeyInIgnition)’ Vibration KeyInIgnition AlarmGoOff DriverDoorOpen PassengerDoorOpen TrunkOpen AlarmActivated

26. CMPUT 329 - Computer Organization and Architecture II26 Building a Circuit From a Truth Table Design a logic circuit to implement a two bit adder. This circuit has three inputs (A, B, Cin), and two outputs (S, Cout). The output S is one if the sum is one, i.e., the number of inputs equal one is odd. The carry out output is one if the sum produces a carry, i.e., two or more of the inputs are one. Adder Cin Cout S B A

27. CMPUT 329 - Computer Organization and Architecture II27 Building a Circuit From a Truth Table Adder Cin Cout S B A S = A’B’Cin + A’BCin’ + AB’Cin’ + ABCin Cout = A’BCin + A B’Cin + ABCin’ + ABCin = A’BCin + ABCin + AB’Cin + ABCin + ABCin’ + ABCin = BCin + ACin + AB = (A’ + A)BCin + (B’ + B)ACin + (Cin’ + Cin)AB = 1·BCin + 1· ACin + 1· AB