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第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Resistive switching and device reliability in ZnO-based nonvolatile memory devices Ming Chuan University Department of Electronic Engineering Wen-Ping Chiang, Min-Yu Yang, Chin Wang, Ge- Jia Liao, Hsien-Mei Wang, and Fu-Chien Chiu *
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2 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Outline Introduction Experiment Results and discussion Conclusions References
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3 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Overview of memories Memories Volatility Non-volatility Static RAM (SRAM) Dynamic RAM (DRAM) Static RAM (SRAM) Dynamic RAM (DRAM) Resistive RAM (RRAM) Flash [1] (NAND, NOR, SONOS, et al.) Ferroelectric RAM [2] (FeRAM) Magnetic RAM [3] (MRAM) Phase change memory [4] (PCM) Resistive RAM (RRAM) Flash [1] (NAND, NOR, SONOS, et al.) Ferroelectric RAM [2] (FeRAM) Magnetic RAM [3] (MRAM) Phase change memory [4] (PCM)
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4 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Introduction Because traditional Flash memory device are approaching physical limitations, the developments of next generation nonvolatile memory devices are in urgent need. Resistive random access memory (RRAM) has attracted a great deal of attention. Why? Structural simplicity Low operation voltage Excellent durability Area miniaturization CMOS process compatibility High speed Multibit function
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5 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Classification of RRAM RRAM materials: Perovskite-type oxides Binary metal oxides Solid-state electrolytes Organic compounds Amorphous Si
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6 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Experiments In this work, Pt/ZnO/Pt MIM diodes were fabricated. Si SiO 2 Ti Pt ZnO(25nm) Pt V Top electrode Bottom electrode Pt Device fabrication process: Substrate wafers (Pt/Ti/SiO 2 /Si) ZnO (25 nm) deposition (RF magnetron sputtering) Shadow mask Pt top electrode deposition (RF magnetron sputtering) Device formation (Pt / ZnO (25 nm) / Pt)
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7 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Results and discussion Physical analysis of thin film Electrical characteristics Resistive switching behavior Pulse width effect on V SET /V RESET Temperature effect on V SET /V RESET Conduction mechanism in ZnO Endurance and memory window
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8 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference XPS in Pt/ZnO/Pt X-ray photoelectron spectroscopy (XPS) spectrum of O 1s in ZnO film. The peaks at 530 and 532 eV are due to lattice oxygen (ZnO) and nonlattice oxygen (oxygen vacancy).
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9 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference XPS in Pt/ZnO/Pt XPS spectrum of Zn 2p in ZnO film. Zn 2p 1/2 and 2p 3/2 for Zn 2+ correspond to the peaks at 1046.2 and 1023.2 eV. Zn 2p 1/2 and 2p 3/2 for Zn 0 correspond to the peaks at 1047 and 1024 eV.
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10 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Resistive switching characterization In Pt/ZnO/Pt structure, bipolar resistive switching behavior was found and electroforming was required.
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11 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Switching voltage vs. ac voltage pulse width Both set voltage (V SET ) and reset voltage (V RESET ) are increased with decreasing ac voltage pulse width.
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12 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Switching voltage vs. temperature Temperature dependence on set/reset voltage.
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13 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference I-V characteristics in HRS Temperature-dependent I-V characteristics in high-resistance state (HRS).
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14 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Hopping conduction in HRS Trap spacing (a) extraction of hopping conduction in high- resistance state (HRS).
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15 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Arrhenius plot Arrhenius plot for trap level (Φ t ) extraction.
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16 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference J-E curves in LRS Temperature-dependent J-E curves in low-resistance state (LRS).
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17 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference DC Cycling Endurance Voltage-swept I-V characteristics of dc cycling endurance.
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18 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Weibull plots in HRS and LRS Weibull plots of HRS/LRS resistances during dc switching cycles.
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19 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference AC/DC memory window Memory window as a function of the number of dc/ac switching.
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20 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Conclusion 1. The bipolar resistive switching behavior was found in Pt/ZnO/Pt structure. 2. The amplitude of resistive switching voltage is dependent on the applied ac voltage pulse width (W ac ). 3. During the set process, the conductive filaments formed are associated with the defect state of interstitial zinc in ZnO film. The defect trap spacing is about 2 nm and the trap energy level is about 0.46 eV. 4. For the test of dc cycling endurance, a serious memory window closure is considered. Whereas, the ac cycling endurance can be over 10 6 switching cycles.
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21 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference References [1] W. W. Zhuang et al., “Novell colossal magnetoresistive thin film nonvolatile resistance random access memory (RRAM),” in IEDM Tech. Dig., 2002, pp. 193-196. [2] H. Akinaga and H. Shima, “Resistive random access memory (ReRAM) based on metal oxides,” Proc. IEEE, vol. 98, no. 12, pp. 2237-2251, Dec. 2010. [3] A. Sawa, “Resistive switching in transition metal,” Materials Today, vol. 11, no. 6, pp. 28-36, Jun. 2008. [4] R. Waser, R. Dittmann, G. Staikov, and K. Szot, “Redox-based resistive switching memories – nanoionic mechanisms, prospects, and challenges,” Adv. Mate., vol. 21, pp. 2632-2663, Jun. 2009. [5] D. Lewis and H. Lee, “Architectural evaluation of 3D stacked RRAM caches,” in IEEE International Conference on 3D System Integraion (3DIC), 2009, pp. 1-4. [6] M. Colle, M. Buchel, and D. M. de Leeuw, “Switching and filamentary conduction in non-volatile organic memories,” Organic Electronics, vol. 7, pp. 305-312, 2006. [7] S. H. Jo, K. H. Kim, and W. Lu, “Programmable resistance switching in nanoscale two-terminal devices,”, Nano Lett., vol. 9, no. 1, pp. 496-500, 2009. [8] I. G. Baek et al., “Highly scalable non-volatile resistive memory using simple binary oxide driven by asymmetric unipolar voltage pulses,” in IEDM Tech. Dig., 2004, pp. 587-590. [9] H. Morkoc and U. Ozgur, Zinc Oxide: Fundaments, Materials and Device Technology, Berlin: Wiley-VCH; 2009.
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22 第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference References [10] M. Villafuerte, S.P. Heluani, G. Juárez, G. Simonelli, G. Braunstein, and S. Duhalde, “Electric-pulse-induced reversible resistance in doped zinc oxide thin films,” Appl. Phys. Lett., vol. 90, no. 5, p. 052105, Jan. 2007. [11] W.Y. Chang, Y.C. Lai, T.B. Wu, S.F. Wang, F. Chen, and M.J. Tsai, “Unipolar resistive switching characteristics of ZnO thin films for nonvolatile memory applications,” Appl. Phys. Lett., vol. 92, no. 2, p. 022110, Jan. 2008. [12] N. Xu, L. Liu, X. Sun, X. Liu, D. Han, Y. Wang, R. Han, J. Kang, and B. Yu, “Characteristics and mechanism of conduction/set process in TiN/ZnO/Pt resistance switching random-access memories,” Appl. Phys. Lett., vol. 92, no. 23, p. 232112, Jun. 2008. [13] S. Kim, H. Moon, D. Gupta, S. Yoo, and Y.K. Choi, “Resistive switching characteristics of sol–gel zinc oxide films for flexible memory applications,” IEEE Trans. Electron Devices, vol. 56, no. 4, pp. 696-699, Apr. 2009. [14] S. Peng, F. Zhuge, X. Chen, X. Zhu, B. Hu, L. Pan, B. Chen, and R. W. Li, “Mechanism for resistive switching in an oxide-based electrochemical metallization memory,” Appl. Phys. Lett., vol. 100, no. 7, p. 072101, Feb. 2012. [15] F. C. Chiu, “A review on conduction mechanisms in dielectric films”, Advances in Materials Science and Engineering, vol. 2014, Article ID 578168, 18 pages, Feb. 2014. [16] A. B. Djurisic and Y. H. Leung, “Optical properties of ZnO nanostructures,” Small vol. 2, no. 8-9, pp. 944-961, 2006. [17] D. Ielmini, F. Nardi, and C. Cagli, “Universal reset characteristics of unipolar and bipolar metal-oxide RRAM,” IEEE Trans. Electron Devices, vol. 58, no. 10, pp. 3246-3253, Oct. 2011. [18] A. W. Strong, E. Y. Wu, R. P. Vollertsen J. Sune, G. L. Rosa, T. D. Sullivan, and S. E. Rauch, Reliability Wearout Mechanisms in Advanced CMOS Technologies. John Wiley & Sons, Hoboken, NJ, 2009. [19] E. L. Lehmann, Theory of Point Estimation. John Wiley & Sons, New York, 1983.
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第 13 屆台灣靜電放電防護技術暨可靠度技術研討會 2014 Taiwan ESD and Reliability Conference Thank you for your attention.
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