1. Heterogeneous Technology Alliance Neuromorphic circuits for low-power Digital Signal Processing.

2. The Heterogeneous Technology Alliance HTA Neuromorphic circuits for low-power Digital Signal Processing. On going projects REPTILE (2011) 65 nm 1 mm² mixed-signal design 32 Analog neurons Results 40 pJ/spike (best state-of-the-art) X30 power efficiency (digital signal processing, estimation) SPIDER (2013) Full range architecture 25x32 neurons On-going results [1] A. Joubert, et al, "Hardware spiking neurons design: Analog or digital?", in Proceedings of the 2012 Annual International Joint Conference on Neural Networks (IJCNN), June 2012 [2] A. Joubert, et al, "Capacitance of TSVs in 3-D stacked chips a problem? Not for neuromorphic systems!", in Proceedings of the 49th Annual Design Automation Conference (DAC), June 2012 [3] B. Belhadj, et al, "Configurable conduction delay circuits for high spiking rates", in Proceedings of the 2012 IEEE International Symposium on Circuits and Systems (ISCAS), May 2012

3. The Heterogeneous Technology Alliance HTA Project Idea: Neuromorphic circuits for low-power Digital Signal Processing EU call: Project Idea short description: Neuromorphic circuits for low-power Digital Signal Processing. Short Description: Designing a family of neuromorphic accelerators for fast/low-power signal processing Replacement of classical DSP with breakthrough power gains (30x) Potential Applications: Co-processors in multi-core of µcontroller systems Competences needed: Mix analog / digital design Network-on-Chip specific design Neuromorphic architectures programming Contact: Alexandre.valentian@cea.fr Hubs Network infra Nodes