1. Decoder A01-A31 address, LWORD*, IACK*, AM0-AM5 SN74LS245 Interrupter 5V-3.3V Level change Xilinx CPLD 125MHz XC95288 JTAG VMEbus interface 2*18-Bits 133MHz FIFO -- Interrupter iackc5<='1' when IACKIN='0' and address(3 downto 1)="101" and AS='0' and DS0='0' and IACK='0' else '0'; iackc6<='1' when IACKIN='0' and address(3 downto 1)="110" and AS='0' and DS0='0' and IACK='0' else '0'; iackc <='1' when iackc5='1' or iackc6='1' else '0'; process(iackc5,iackc6,rec,wrc,reg,DATA) begin if iackc5='1' then DATA(7 downto 0) <= "01110111"; elsif iackc6='1' then DATA(7 downto 0) <= "01010000"; elsif wrc='1' then reg <= DATA; elsif rec='1' then DATA <= reg+"00010001000100010001000100010001"; else DATA <= "ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZ"; end if; end process; Function Descriptions 1. Interrupter 2. Interrupt 5,6 3. Read/Write 4. IACKIN/IACKOUT

2. Decoder A01-A31 address, LWORD*, IACK*, AM0-AM5 SN74LS245 Interrupter 5V-3.3V Level change Xilinx CPLD 125MHz XC95288 JTAG VMEbus interface 2*18-Bits 133MHz FIFO **************************** Resource Summary **************************** Macrocells Product Terms Registers Pins Function Block Used Used Used Used Inputs Used 218/288 ( 75%) 934 /1440 ( 64%) 91 /288 ( 31%) 81 /168 ( 48%) 644/864 ( 74%) PIN RESOURCES: Signal Type Required Mapped | Pin Type Used Remaining ------------------------------------|--------------------------------------- Input : 28 28 | I/O : 80 80 Output : 20 20 | GCK/IO : 1 2 Bidirectional : 32 32 | GTS/IO : 0 4 GCK : 1 1 | GSR/IO : 0 1 GTS : 0 0 | GSR : 0 0 | ---- ---- Total 81 81 Adopt from vmebus.rpt

4. Decoder A01-A31 address, LWORD*, IACK*, AM0-AM5 SN74LS245 Interrupter 5V-3.3V Level change Xilinx CPLD 125MHz XC95288 JTAG VMEbus interface 2*18-Bits 133MHz FIFO Adopt from sn74v245.pdf

5. Capture and record 1GHz signal (Realized circuit) National Semiconductor ADC081000 Xilinx Spartan-3 XC3S400 1GHz Analog Signal 1GHz Clock signal 500MHz synchronous latch 4 ports 8-bits 250MHz FIFO 2 ports 8-Bits 500MHz LVDS Data 4 ports 8-bits 250MHz Level 1 Cut Comparator 4 ports 8-bits 250MHz Level 2 Cut Comparator 8 ports 16-bits 125MHz Encoder 4 ports 8-bits 250MHz MUX Time Counter Trigger 250MHz synchronous clock 4*32-Bits 125MHz Dual-port RAM 70T3519 Decoder A01-A31 address, LWORD*, IACK*, AM0-AM5 SN74LS245 Interrupter 5V-3.3V Level change Xilinx CPLD 125MHz XC95288 XC18V02 XC18V01 JTAG

6. Xilinx Spartan-3 XC3S400 Xilinx Spartan-2 XC2S100 Xilinx CPLD XC95288 AD FADC ADC081000