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Published byGeorgia Griffith Modified over 9 years ago
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1 SUTS ariga
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SUTS Track Recognition Board 10 FPGA for track recognition, 1 FPGA for communication 40cm2/h scanning power / board
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SUTS Over view Camera Image processor Track recognition MASTER PC Slave PC Piezo driver Stage Piezo 1GB/s 2MB/s 100MB/s lamp Slave PC
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SUTS DAQ Track recognition board FPGA for comunication Virtex II 100 xilinks FPGA Virtex II 70 100 pin PCI board with FPGA Xilinx Spartan II Memory Disk 2MByte Image data Track data Track recognition PC
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PCI Board with FPGA I’m fighting against …
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Status of Track recognition board The check of the connection was done. FPGA programming test was almost done. Soon, It will be connected with stage and camera …next week.
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SUTS tracking with old board 30Hz x 140micron square 20cm2/h Angle range: theta<0.2
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Z drive 30Hz ~ 100 Hz piezo drive
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Track recognition test Microtrack level 1e5 track/cm2
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Track density
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3cm Track density 10cm Track density is related with air gap under the emulsion.
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Strong relation with brightness.
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Brightness control by shutter SUTS-CMOS-Camera have electric shutter. Measuring the brightness every frame, feed back to shutter speed.
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Microtrack
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Basetrack (raw)
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Basetrack Linked
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Angle resolution delta angle from base-angle
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Delta angle from conventional stage Stage X 5mm interval …. Stage speed fractuation …
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Efficiency (preliminary) 6 Plate exposed to cosmic. ntrk12345/ntrk12-45 = 88%
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