1. Instruction Sets: Addressing modes and Formats Group #4  Eloy Reyes  Rafael Arevalo  Julio Hernandez  Humood Aljassar Computer Design EEL 4709c Prof: Herman Watson Spring 2009

2. Addressing Modes  Immediate  Direct  Indirect  Register  Register Indirect  Displacement (Indexed)  Stack

3. Immediate Addressing  Operand is part of instruction  Value to be loaded is fixed at compile-time (not very flexible)  e.g. ADD 8  Add 8 to contents of accumulator  8 is operand  Does not have an effective address  Fast (Value to be loaded – included in inst)  Value stored in memory follows immediately the operation code in memory

4. Immediate Addressing Diagram Operand Opcode Instruction

5. Direct Addressing  Address field contains address of operand  Effective address (EA) = address field (A)  e.g. ADD C  Add contents of cell C to accumulator  Look in memory at address C for operand  Directly retrieves stored value in memory from another memory location.  Fast (Internal RAM)  Limited address space

6. Direct Addressing Diagram Address AOpcode Instruction Memory Operand

7. Indirect Addressing  Memory cell pointed to by address field contains the address of (pointer to) the operand  EA = (C)  Look in C, find address (C) and look there for operand  Exceptional level of flexibility.  Always refers to Internal RAM.

8. Indirect Addressing  2 n where n = word length  Multilevel, cascaded, or nested  Address space (Large)  Slower  Multiple memory accesses -> operand

9. Indirect Addressing Diagram Address AOpcode Instruction Memory Operand Pointer to operand

10. Register Addressing  Operand contained in register (Named -> address filed)  Registers (Limited)  Needs -> Very small address field  Instructions (Fast, hence faster instruction fetch)  EA= R

11. Register Addressing  Address space -> Very limited  Memory Address -> None  Multiple registers -> Improves performance  N.B. C programming  Good compiler writing or assembly programming -> Required  Execution -> Very fast

12. Register Addressing Diagram Register Address ROpcode Instruction Registers Operand

13. Register Indirect Addressing  Address of operand obtained indirectly via an address register.  Indirect addressing uses an address register to point at the location of the operand in memory.  EA = (R)  Generates lots of different addresses when program executed.  Address Space -> Large (2 n )

14. Register Indirect Addressing Diagram Register Address ROpcode Instruction Memory Operand Pointer to Operand Registers

15. Displacement Addressing  Choosing displacement field size is important -> directly affects instruction length.  EA = A + (R)  Address field hold two values  A = base value  R = register that holds displacement  or vice versa

16. Displacement Addressing Diagram Register ROpcode Instruction Memory Operand Pointer to Operand Registers Address A +

17. Relative Addressing  An address specified by indicating its distance from another address. (Base Address)  A version of displacement addressing  For example: B+15  B being the base address and 15 the distance (Called the offset)

18. Base-Register Addressing  R -> Explicit or Implicit  R contains pointer to base address  A holds displacement  e.g. segment registers in 80x86

19. Indexed Addressing  Variables which use indexed addressing:  Variables referenced by pointers  Arrays  Local Variables, in stack-based languages.  E.g. (IX, IY registers)  A = base  R = displacement  EA = A + R  Automatically increments address with the value stored in an index register.

20. Combinations  Combinations of the three basic addressing modes - > additional addressing modes.  Resultant or operational instruction cannot be immediate data. (Direct of Indirect memory location)  Postindex  EA = (A) + (R)  Preindex  EA = (A+(R))

21. Stack Addressing  Data structure grows downward from high to low memory in SP.  New byte pushed onto the stack -> SP decremented  Byte pulled from the stack -> SP incremented  Operand is (implicitly) on top of stack  e.g.  ADDPop top two items from stack and add

22. Pentium Addressing Modes  Virtual or effective address is offset into segment  Starting address plus offset gives linear address  This goes through page translation if paging enabled  12 addressing modes available  Immediate  Register operand  Displacement  Base  Base with displacement  Scaled index with displacement  Base with index and displacement  Base scaled index with displacement  Relative

23. Pentium Addressing Mode Calculation

24. PowerPC Addressing Modes  Load/store architecture  Indirect  Instruction includes 16 bit displacement to be added to base register (may be GP register)  Can replace base register content with new address  Indirect indexed  Instruction references base register and index register (both may be GP)  EA is sum of contents  Branch address  Absolute  Relative  Indirect  Arithmetic  Operands in registers or part of instruction  Floating point is register only

25. PowerPC Memory Operand Addressing Modes

26. Instruction Formats  Essentially the layout of the Bits in an Instruction set including:  OpCodes  Operand(s) expressed either implicitly or explicitly  Memory address  Register  Usually more than one instruction format is used and usually varies depending on whether its addressing Memory, I/O devices or a Register

27. Instruction Length  Affected by and affects:  Memory size  Memory organization  Bus structure  CPU complexity  CPU speed

28. Longer Instruction Length  Pros:  More OpCodes  Operands  Addressing Modes  Greater Address Range  Therefore easier Programming Language  Cons:  Waste of Space Example: A 64 bit instruction is less than twice as useful as a 32 bit instruction.

29. Allocation of Bits  Number of addressing modes:  i.e. certain opcodes always call for indexing, in others, addressing modes must be explicit and more than one bit might be needed.  Number of operands:  Typical instructions in today’s machines call for two operands.  Register versus memory:  The more registers that can be used for oprand references, the fewer bits are needed. Most resent day designs have at least 32 registers.  Number of register sets:  A method used by Pentium uses two sets of 8 registers and only 3 bits are required to identify the register. The opcode will determine which register is being referenced.  Address range:  Rarely used because it imposes a limitation in the amount of address since its directly related to the size of the address.

30. PDP-8 Instruction Design  Only 12 bit Instructions  7 Bits to Reference to Memory:  (2)^7 = 128 Different Words  2 Bits used as modifiers ;  First referenced to page containing instruction  Second used to indicate whether direct or indirect addressing is to be used.  3 Bits used for the opcode:  Of the 8 different opcode combinations, 2 are used to reference a page bit or an indirect leaving 6 basic operations.

31. PDP-8 Instruction Format

32. PDP-10 Instruction Format Orthogonality Principle that two variables are independent of each other. Completeness Each arithmetic data type (integer, fixed-point, real) should have a complete and identical set of operations. Direct addressing Used instead of base plus displacement addressing to lower the burden on the programmer.

33. PDP-11 Instruction Format

34. The PDP-11 was designed to provide a powerful and flexible instruction set Only constraint was the use of a 16-bit minicomputer [BELL70] It employs 16-bit general purpose registers Two of these 16 have a significant purposes: One is used as a stack pointer for special purpose stack operations The other is used as the program counter (containing address of next instruction)

35. VAX Instruction Examples

36. VAX  VAX was designed to solve the problem of having a relatively small number of fixed instruction formats. - Having a small fixed instruction format posed two problems:  Addressing mode and opcode are not orthogonal  Only a limited number of operands can be accomodated  The solution:  All instructions should have the “natural” number of operands  All operands should have the same generality in specification.s

37. Questions?  Why is it known immediate addressing?  Which addressing mode has a limited address space?  How does data structure grows in stack addressing?  Give two examples of indexed addressing modes.  Why do programmers prefer longer instruction ?  How many bits does the PDP-8 design use for addressing?  How is called the address the Pentium translation mechanism?  In register operand mode, what one has to with 64-bit floating point operation?  The PDP-10 was designed to be what kind of system and with what emphasis?  What two criteria were used in designing the VAX instruction format?