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SAT Sweeping with Local Observability Don’t-Cares Qi Zhu 1 Nathan Kitchen 1 Andreas Kuehlmann 1,2 Alberto Sangiovanni-Vincentelli 1 1 University of California at Berkeley 2 Cadence Berkeley Labs July 25, 2006
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Outline Background AND/INV Graph SAT Sweeping Improving SAT Sweeping with Observability Don’t-Cares Motivating Example Observability and Local Observability Algorithm Flow Implementation Experimental Results Conclusions
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Representation of Boolean functions Consists of AND nodes and complement edges AND/INV Graph (AIG) V1V1 V2V2 V3V3 V4V4 V5V5 x1x1 x2x2 x3x3 321 )(xxxF )( 4 vf )( 5 vf Pros: Better memory efficiency than BDD-like reps Cons: Non-canonical Redundant
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SAT Sweeping Simplification of AIGs can exponentially improve Boolean reasoning [Kuehlmann97]. Several techniques have been developed to simplify circuit graphs [Brand93, Kunz93, Goldberg01, Lu03]. SAT sweeping [Kuehlmann04] is fast and robust since it combines: Random simulation SAT queries Structural hashing
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SAT Sweeping Example V1V1 V2V2 V3V3 V4V4 V5V5 V6V6 V8V8 V9V9 x1x1 x2x2 x3x3 random simulation refine classification pick two vertices in same class; do SAT query merge vertices update simulation vec. any class size>1? N Y SAT UNSAT end 0 0 1 0 0 0 0 0 1 0 0 10 V1V1 V3V3 V6V6 V7V7 V2V2 V5V5 V4V4 Use SAT solver to check the equivalence of v 6 and v 7. Use SAT solver to check the equivalence of v 2 and v 5. v 7 can be merged onto v 6 since f(v 7 )=f(v 6 ). V7V7 0 01 11 11 10 11 10 10
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Outline Background AND/INV Graph SAT Sweeping Improving SAT Sweeping with Observability Don’t-Cares Motivating Example Observability and Local Observability Algorithm Flow Implementation Experimental Results Conclusions
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V5V5 Motivating Example V2V2 V1V1 V3V3 V4V4 V6V6 V8V8 x1x1 x2x2 x3x3 V7V7 0000 0011 x1x1 x 2 x 3 0 1 00011110 V4V4 0001 0001 V5V5 x1x1 x 2 x 3 0 1 00011110 0000 1001 x1x1 x 2 x 3 0 1 00011110 V6V6 V6V6 V5V5 V4V4 ? ?
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Observability Observability for AIGs without reconverging paths: Full observability computation is VERY expensive! v v’ other(v’, v) … … otherwise vvotherf )),'(( vobs)'(( Ovif 1 vobs)( vFOv )(' )
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k levels of observability: obs(v, k) Criterion for merging vertices under local observability: Local Observability V … … … k=0k=1k=2 0),()()( kvobsvfuf k ≥ circuit depth
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Equivalence-class refinement cannot be used since the merging criterion is not an equivalence relation. Search for merging candidates of each vertex individually. Build a dictionary of simulation vectors to find candidates efficiently. V5V5 V2V2 V1V1 V3V3 V4V4 V6V6 V8V8 x1x1 x2x2 x3x3 V7V7 V6V6 Algorithm ?
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Mask simulation vectors with observability vectors. Compare simulation vectors and observability vectors to filter candidates. Check the merging criterion with SAT solver. Algorithm w v v’ … … other(v’,v) OBS(v’,1)=[1101] OBS(v,2)=[0100] F(w)=[0110] 0),( kvOBS)()( vFuF otherwise( [ )),((vvotherF )1,(kvOBS ),(kv )(vFOv 0 if]11111kOv )
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update simulation vec.and candidates Algorithm Flow random simulation; compute obs vec. find merging candidates from dictionary pick candidate vertex and do SAT query merge vertices candidates exist? N Y UNSAT SAT for each vertex V5V5 V1V1 V2V2 V5V5 V1V1 V2V2 V3V3 V4V4 V6V6 V8V8 x1x1 x2x2 x3x3 V7V7 1111 110 Dictionary 001 110 0 0 0 0 1 V4V4 V6V6 V1V1 V2V2 ? 1-level observability
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Dictionary Implementation Use a binary trie. Simulation vectors of vertices are stored in leaf nodes. bit 4 bit 3 1 0 0 1 F(v 4 )=0101 F(v 3 )=1110 F(v 5 )=0100 F(v 2 )=0110
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OBS(v 1, k) = 1 0 1 0 F(v 1 ) = 0 1 0 0 F(v 5 )=0100 F(v 4 )=0101 Dictionary Implementation Search for merging candidates along the trie using simulation vectors and observability vectors. F(v 3 )=1110 F(v 2 )=0110 candidates for v 1 are v 4, v 5 bit 4 bit 3 1 0 0 1
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Reconverging Structure V1V1 V2V2 V3V3 V6V6 V4V4 V5V5 x1x1 x2x2 x3x3 0011 0011 x1x1 x 2 x 3 0 1 00011110 V2V2 1111 1111 x1x1 x 2 x 3 0 1 00011110 1 0000 0011 x1x1 x 2 x 3 0 1 00011110 V4V4 V4V4 Can v 2 be merged to constant 1 if k=2? The controlling value at v 4 changes! Reconverging structure causes the problem. We use a conservative approximation of observability to avoid this problem.
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Outline Background AND/INV Graph SAT Sweeping Improving SAT Sweeping with Observability Don’t-Cares Motivating Example Observability and Local Observability Algorithm Flow Implementation Experimental Results Conclusions
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Percentage of Vertices Merged k (levels of observability) No ODCs Experimental Results 15 designs from IWLS 2005 benchmark set (synthesized from OpenCores repository) Size from 200 to 48K AND vertices in AIG (200 to 30K Gates) Basic SAT sweeping Runtime Relative to Basic SSW k (levels of observability) No ODCs
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Experimental Results Our approximation of observability is tight. Compared with exact local observability: k=2 : 0.1% fewer vertices merged on average k=5 : 0.5% fewer vertices merged on average Application to bounded model checking Simplified unrolled frames; compared local-ODC-based SAT sweeping with basic SAT sweeping Algorithm Average reduction of vertices in each frame (%) 12345 Basic3.514.016.617.618.0 ODC16.327.430.030.1
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Conclusions ODC-based SAT sweeping simplifies AIGs significantly more than basic version 5.4X more vertices merged with 3 levels of observability than with basic SAT sweeping (4.4X runtime) Greatest benefits from few levels of observability Captures 90% of mergers with 3 levels of observability Broadly applicable for Boolean reasoning Synthesis (combinational and sequential) Verification (bounded model checking, equivalence checking) Available at www.openedatools.org/projects/oagear ODC-based SAT sweeping is simple and inexpensive, and greatly speeds up Boolean reasoning.
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Acknowledgments Steve Teig, Andy Caldwell for initiating the project idea Ellen Sentovich, Christoph Albrecht for valuable discussion
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Thank you!
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