1. Elements of Computer Design Why is the computer the jewel in the crown of digital devices? Church-Turing Hypothesis Minimum requirements i) There must be a means to iterate through a group of instructions. ii) There must be a means of conditionally branching to another instruction. iii) The instructions must be complete relative to the task at hand.

2. Elements of Computer Design Computer Organization

3. Elements of Computer Design Memory Tristate buffer ENinout 00high Z 01 100 111

4. Elements of Computer Design Memory 4 2-bit memories

5. Elements of Computer Design Memory 8 2-bit memories with 2 decoders

6. Elements of Computer Design Memory 8 4-bit memories with two 8 2-bit chips

7. Elements of Computer Design Memory 16 2-bit memories with two 8 2-bit chips

8. Elements of Computer Design CPU organization

9. Elements of Computer Design CPU Register Set (simplified) Register Symbol Description Prog.acc. address register AR4-bit reg. storing memory addressno program counter PC4-bit reg. storing instruction addressno data register DR7-bit reg. storing instructions and datano instruction register IR3-bit reg. storing an instructionno accumulator AC7-bit special reg. for storing datayes general register R7-bit general reg. for storing datayes

10. Elements of Computer Design CPU Instruction Set (simplified) Instruction Instruction type Instruction code Operation LDAii000AAAAAC  M[AAAA] STAiii001AAAAAC  M[AAAA] LDRii010AAAAR  M[AAAA] JNZv011AAAAIF (AC ≠ 0) goto AAAA ADDiv100XXXXAC  AC + R SUBiv101XXXX AC  AC – R IORiv110XXXXAC  AC OR R ANDiv111XXXXAC  AC AND R

11. Elements of Computer Design CPU Fetch Decode Execute Cycle F1:AR  PC F2:DR  M PC  PC + 1 D:IR  DR[6..4] AR  DR[3..0] E1:AC  M E2:M  AC E3:R  M E4:PC  AR E5:AC  AC + R E6:AC  AC – R E7:AC  AC OR R E8:AC  AC AND R

12. Elements of Computer Design CPU control

13. Elements of Computer Design CPU ALU

14. Elements of Computer Design CPU Sample program LDA13; load AC from address 13 LDR 14; load R from address 14 ADD; add AC and R LDR12; load R from address 12 SUB; subract R from contents of AC LDR11; load R from address 11 IOR; OR R with contents of AC LDR10; load R from address 10 AND; AND R with contents of AC STA14; store final result in address 14

15. Elements of Computer Design I/O organization

16. Elements of Computer Design I/O example

17. Elements of Computer Design Summary of topics Motivation Memory tristate buffers addressing addressing w/ mulitple decoders larger memories cascading memories CPU organization instruction set register set fetch-decode-execute control ALU I/0