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Report on T1 and T2 DAQ A.Asahara, H.Kubo, D.Nishida 5/July/2002CANGAROO meeting.

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Presentation on theme: "Report on T1 and T2 DAQ A.Asahara, H.Kubo, D.Nishida 5/July/2002CANGAROO meeting."— Presentation transcript:

1 Report on T1 and T2 DAQ A.Asahara, H.Kubo, D.Nishida 5/July/2002CANGAROO meeting

2 Status on T1 DAQ 1.TDC trouble 2.ADC trouble VME ADC Installed Linux based DAQ Installed 1999 Dec2000Mar2000Nov 7m10m History Took off Can’t read one or two TDC modules! 1.Unstable of Power supply. Fixed. Can’t read one or two ADC modules! Inadequate capacity of power Supply ? LineOct 2000Jul 2002Capacity +5V28.5A28.3A50A +12V7.0A7.8A10A -12V9.9A7.8A10A 2.Tripped off VETO line. High capacity power supplies are getting ready now.

3 Main CPUs for T2 and T3 DRC1 VMIC-7740 Acceptable Trigger 390Hz @deadtime 20% Acceptable Trigger 530Hz @deadtime 20% CPU Pen II 400MHz CPU Pen III 800MHz Width 2u Width 1u Live Time(%) Trigger (Hz) Software techniques for speed-up is meaningless. You should wait for the progress of Hardware!!

4 New TDC for T3 V667ATM-VME KLOEChipAMT-2 VME6U, width 2uSizeVME6U, width 1u 128# of Ch64 1nsResolution0.78ns 64usRange50us A24/32 D16VME accessA24/A32 D16/D32 \8,600 /ch Total \4500,000- Cost\4,500 /ch Total \2100,000- Further information:http://atlas.kek.jp/tdc/ AMT (Atlas Muon TDC) LSI ChipY.Arai et al. @KEK Under development… Final version’s released in the end of July.

5 R & D Event Builder System Compact PCI GIGA bit Ethernet


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