1. TM Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006. Slide 0

2. Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006. TM Erwin J. Prinz, Ph.D. Device Engineer The Zen of Nonvolatile Memories July 27, 2006Paper 47.3

3. Slide 2 Acknowledgements Ko-Min Chang, Craig Swift  NVM Device Engineering Thomas Jew, Ronnie Syzdek  NVM Design Saied Tehrani, Jon Slaughter  MRAM Technology Freescale TSO NVM Team Device, Process, Design, Reliability, Test

4. Slide 3 Outline Introduction Floating Gate Nonvolatile Memories Nitride Charge Storage Nanocrystal Charge Storage Emerging NVM Concepts Conclusions

5. Slide 4 Introduction Silicon Nonvolatile Memories (NVM) store  Code  Data Technology Driver for Scaling  More bits shipped in 2006 than DRAM Rugged, secure, reliable  Engine, transmission, …

6. Slide 5 Types of Nonvolatile Memories

7. Slide 6 Nonvolatile Memory Moore’s Law Example: Engine & Transmission Controller

8. Slide 7 System on Chip with Emb. NVM Engine / Transmission Controller 32-bit CPU Core 1 Mbit Embedded Flash A/D Converter Peripherals The Ultimate System on a Chip Freescale’s MPC565 PowerPC TM Microprocessor

9. Slide 8 System on Chip with Emb. NVM CPU – Bus – NVM  LV / high speed Pad Ring  I/O (2.5V or 3.3V) NVM Bitcells  HV / statistics NVM Periphery  Analog NVM HV Supplies  Charge pumps

10. Slide 9 System on Chip with Emb. NVM CPU – Bus – NVM  LV / high speed Pad Ring  I/O (2.5V or 3.3V) NVM Bitcells  HV / statistics NVM Periphery  Analog NVM HV Supplies  Charge pumps

11. Slide 10 System on Chip with Emb. NVM CPU – Bus – NVM  LV / high speed Pad Ring  I/O (2.5V or 3.3V) NVM Bitcells  HV write, statistics NVM Periphery  Analog NVM HV Supplies  Charge pumps

12. Slide 11 System on Chip with Emb. NVM CPU – Bus – NVM  LV / high speed Pad Ring  I/O (2.5V or 3.3V) NVM Bitcells  HV / statistics NVM Periphery  Analog NVM HV Supplies  Charge pumps

13. Slide 12 System on Chip with Emb. NVM Many device types  LV, I/O, HV, NVM Many design styles  Memory  Analog  HV Switch  Synthesized Logic Many Design Tools !!  SoC design flow  NVM Reliability Modeling  Bitcell Modeling Freescale’s MPC565 PowerPC TM Microprocessor

14. Slide 13 Traditional NVM Operation

15. Slide 14 Floating Gate NVM Operation

16. Slide 15 NAND NOR

17. Slide 16 Floating Gate Scaling Limit

18. Slide 17 High Reliability Aspect of NVM End-of Life Bitcell Modeling  Knowledge of failure modes Interaction of Bitcell with NVM Design  Calibrated Tools Failure Rate Prediction for SoC Zero Defects

19. Slide 18 1-Transistor vs. Split Gate Bitcell

20. Slide 19 Limitation of High Read Voltage 1-Transistor Array Split Gate Array

21. Slide 20 Nitride Charge Storage (SONOS)

22. Slide 21 Virtual Ground Array

23. Slide 22 Silicon Nanocrystal NVM 5-10 nm diameter “nanocrystals”

24. Slide 23 Silicon Nanocrystal Formation Manufacturable in RT-CVD Tool

25. Slide 24 Novel Device Concepts …

26. Slide 25 … and Experimental Results

27. Slide 26 Revolutionary Memory: MRAM Information stored as magnetic polarization Detected as a resistance  R MIN or R MAX Isolation transistor can be logic device, no high on/off ratio needed Bit cell size competitive with embedded DRAM 4 Mbit MRAM in production now !

28. Slide 27 Other Novel Methods of NVM FeRAM  Bitcell Scalability ? Phase Change Memory  Data Retention at Elevated Temperatures ? Resistive RAM  Device Understanding ?

29. Slide 28 Conclusions Floating gate NVM scalable to 65 nm or 45 nm SONOS, nanocrystal Flash to 32 nm Revolutionary, more universal memories being developed  Require killer application for deployment Challenges in design, verification, reliability, test, manufacturing …