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BIC Issues Alan Fisher PEP-II Run-4 Post-Mortem Workshop 2004 August 4–5.

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Presentation on theme: "BIC Issues Alan Fisher PEP-II Run-4 Post-Mortem Workshop 2004 August 4–5."— Presentation transcript:

1 BIC Issues Alan Fisher PEP-II Run-4 Post-Mortem Workshop 2004 August 4–5

2 Overview of “The BIC” BIC: Bunch-Injection Controller Handles both total ring currents (DCCT) and currents in every bunch (bunch-current monitor). Analog stage of bunch-current monitor (one per ring): A set of 4 BPM-type buttons and a 2-cycle summing comb filter at 1428 MHz gets the beam signal. A downconverter mixes the signal to baseband with a 1- GHz IF bandwidth to separate the pulses from each bucket. Measures at 4 phases:  cosine and  sine Pedestal subtraction; Quadrature sum to reduce sensitivity to phase transient.

3 DC Current Transformer DCCT (one per ring): Measures total current in the ring, with 10  A accuracy. A Bergoz current transformer is on the beampipe. Controller in rack outside gives an analog output. Read by a Keithley integrating voltmeter. Communicates with the BIC via GPIB. A second DCCT analog output goes to a SAM.

4 VXI Crates for the Bunch Current VXI crates (one per ring): Digitizer board, clocked at RF rate (476 MHz). Two “decimator” boards: Each has 6 Xilinx gate arrays to process data from 1/12 of the buckets. Each bucket gets data from every 8 th turn. Averaged over 250 turns. Measures full ring in 15 ms. Crate processor: An old National Instruments module running Windows NT 3.51. Reads the Xilinx data. Averages over 1 second. Writes to Bit-3 shared memory.

5 VME Crates VME crate (one handling both rings): The crate processor is the actual BIC. Originally an old 40-MHz 167 processor. Upgraded at start of the run to a 177 (60 MHz). Borrowed from BaBar. Needed to handle the extra load for trickle charge. Reads the Bit-3 shared memory. Communicates with the DCCT’s Keithley voltmeters via GPIB. Serves as the EPICS interface (IOC) for the DCCT and bunch current. Stores and integrates luminosity data too.

6 Repeated BIC Crashes throughout the Run BIC (VME) is overloaded. Normally needs about 88% of CPU time. Recently, most EPICS window support moved to a gateway, but this was not enough. GPIB link to the Keithley meters hangs. BIC gets stuck in a loop. Load goes to 100% of CPU. Needs power cycling (sometimes of meters too) to break out. Code changes to exit the loop after a delay have not worked.

7 VME Processor Failures Processor failed once in May, replaced. Replacement’s clock ran too fast, causing incorrect integration of luminosity. Ron used a software work-around. Failed again in June. FAIL light was stuck on. Replaced processor. Worked only briefly. We ended up replacing the carrier card for the GPIB interface.

8 VME Processor Upgrade Want to replace the processor with a 2700 Power PC board (  300 MHz). This processor hasn’t been able to connect to BIC’s GPIB. Now using a homemade GPIB interface. Changing to a robust new GPIB driver from the EPICS collaboration. Written at ANL; tested at SNS. This driver should work with the Power PC. Also gives an error rather than getting stuck in a loop. Will test new processor and driver during this down.

9 Fallback for Continued GPIB Trouble Put everything but GPIB on the Power PC. Put only GPIB on a 167. If GPIB hangs, the Power PC can intervene. The SAM readout of the DCCT will be provided to BIC users by the Power PC while the GPIB is hung. Now, the RF tuners and the tune feedforward make changes that cause aborts when they get a false current reading.

10 VXI Processor Upgrade Want to replace the obsolete processors with Power PCs of the type used in the RF stations. An interrupt problem now prevents writing to the Bit- 3 shared memory. Will be fixed by Andrew Young during the down. Power PC runs VX Works only, and so can’t run the LabView diagnostic routines used for debugging. Later we can add EPICS support to the Power PCs and provide EPICS diagnostics.

11 Improved “Pseudo-Lifetime” Algorithm Regular dI/dt and lifetime are meaningless during trickle. Present pseudo-dI/dt algorithm: Read DCCT at 2 Hz. Get dI/dt from differences. dI/dt values between some minimum and a maximum are presumed to come from intervals with no trickle. These are smoothed with older data for pseudo-dI/dt. New algorithm: Track which buckets were topped off in the past 2 seconds. Remove the increase in their currents from the change in the DCCT. Smooth with older data.

12 Comparison of dI/dt Values: HER

13 Comparison of dI/dt Values: LER

14 “Gold” Deconvolution Deconvolution corrects for ringing of a bunch-current signal into the following buckets. Must be measured with an isolated bunch. But sometimes people forget and do it with a full ring. Now we can’t back out an invalid measurement. Can’t remeasure it until an abort. Trickle makes a poor fill. Ron will let us save a gold deconvolution array that can be recalled when needed.


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