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Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-2 Altera Cyclone II (484 Pin BGA) 22 Pins
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Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-3 SW9 L2 SW8 M1 SW7 M2 SW6 U11 SW5 U12 SW3 V12 SW1 L21 SW4 W12 SW2 M22 SW0 L22 KEY3 T21 KEY2 T22 KEY1 R21 KEY0 R22 DE1 Pin Assignments LED R9 R17 LED R8 R18 LED R7 U18 LED R6 Y18 LED R5 V19 LED R4 T18 LED R3 Y19 LED R2 U19 LED R1 R19 LED R0 R20 LED G7 Y21 LED G6 Y22 LED G5 W21 LED G4 W22 LED G3 V21 LED G2 V22 LED G1 U21 LED G0 U22
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Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-4 HEX3 DE1 Pin Assignments 0 1 2 3 4 5 6 HEX2 HEX1 HEX0 HEX0[0]PIN_J2 HEX0[1]PIN_J1 HEX0[2]PIN_H2 HEX0[3]PIN_H1 HEX0[4]PIN_F2 HEX0[5]PIN_F1 HEX0[6]PIN_E2 HEX1[0]PIN_E1 HEX1[1]PIN_H6 HEX1[2]PIN_H5 HEX1[3]PIN_H4 HEX1[4]PIN_G3 HEX1[5]PIN_D2 HEX1[6]PIN_D1 HEX2[0]PIN_G5 HEX2[1]PIN_G6 HEX2[2]PIN_C2 HEX2[3]PIN_C1 HEX2[4]PIN_E3 HEX2[5]PIN_E4 HEX2[6]PIN_D3 HEX3[0]PIN_F4 HEX3[1]PIN_D5 HEX3[2]PIN_D6 HEX3[3]PIN_J4 HEX3[4]PIN_L8 HEX3[5]PIN_F3 HEX3[6]PIN_D4
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Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-5 Steps in designing with Quartus II 1. Select target device 2. Design Use VHDL, Schematics, etc. 3. Synthesize Build (compile chip) 4. Simulate and verify Timing simulation 5. Check input/output pin assignments Change any that need to be moved 6. Program chip
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Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-6 Device Selection Assignments | Device Cyclone II EP2C20F484C7
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Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-7 Designing/Compiling/Simulating Use any of the following methods to make your design Schematics (Block Diagram File –.BDF) VHDL (.VHD) Verilog (.V) Leave the default settings for the compiler – just press “Play” Use the Simulator to check your work See tutorials (Homework 3) for a guide
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Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-8 Pin Assignment Assign pins to input/output symbols For now inputs come from switches and buttons For now outputs go to LEDs Use the tables from the previous slides to figure out which pins are connected to the parts you need Select Assignments | Pins Use the table at the bottom – ignore the rest Enter the pin number for each I/O
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Seattle Pacific University EE 1210 - Logic System DesignAlteraBoard-9 Programming First, Re-Compile after selecting Pins Select Tools | Programmer Power up the board (red button) Make sure RUN/PROG is in RUN mode Make sure USB-Blaster is specified – if not use the Hardware setup Click Start
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