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DPCL Solid State Device Discrete Control Lecture.

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Presentation on theme: "DPCL Solid State Device Discrete Control Lecture."— Presentation transcript:

1 DPCL Solid State Device Discrete Control Lecture

2 Discrete Input – Output, I/O All devices/control in this course have been “analog” measurements; level, flow, temperature etc. Discrete control implies two stable “states”, open-closed, on-off, etc.

3 Inputs-Outputs Inputs are push buttons, various switches that sense physical conditions, such as pressure, level, temperature, proximity or limit etc. Outputs are used to control “on-off” devices such as solenoid valves, motors, relays, contactors etc.

4 Terms used to represent discrete behaviour Binary 01 Voltage0 to 1.5 V3.5 to 5 V(or opposite) LogicFalseTrue SwitchOFFON LevelLowHigh

5 Inputs – Switch Configurations SPST Single Pole Single Throw: SPDT Single Pole Double Throw: DPST Double Pole Single Throw: DPDT Double Pole Double Throw:

6 Switches Process Switches are frequently used as safety interlocking devices. Interlock – shutdown system Pressure, level, temperature, flow vibration etc. The safe way to wire these devices is to assume that the normal process condition will result in a closed switch that is there will be current flow to the device during “normal” operation. This way wiring failures will “fail safe”, resulting in the alarmed or interlocked condition.

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9 Discrete I/O Interfacing The control equipment, either a programmable logic controller, PLC or a control system such as DeltaV Distributed Control System, DCS, requires its internal circuitry to be interfaced with these industrial electrical or electromechanical devices. 5V dc TTL (Transistor Transistor Logic) signals for this interface. Isolate computer wiring with “field” wiring, via optical or transformer coupling.

10 Discrete I/O Interfacing The “field” or machine wiring may be either AC or DC powered. Examples of AC and DC interface Input Output Circuits shown in notes.

11 Optical I/O Isolation

12 LAB 4 ● For this lab, you will need to design, with DeltaV function blocks, a sequencing control function. ● Experiment 4


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