1. 1 ASSEMBLING THE "INC" INSTRUCTION INSTRUCTIONOPERATION CODE INC AX40h INC CX41h INC DX42h 4h _h INC AX0100 0000 INC CX0100 0001 INC DX0100 0010 I R

2. 2 ASSEMBLING THE "INC" INSTRUCTION 16-Bit Register Designations AX000SP100 CX001BP101 DX010SI110 BX011DI111 The formal description of the INC instruction is: 0 1 0 0 0 reg reg = 000 --> 111

3. 3 ASSEMBLING THE ”DEC" INSTRUCTION The formal description of the DEC instruction decrement a register by 1 is: 0 1 0 0 1 regreg = 000 --> 111 so DEC AX is 48, DEC CX is 49, etc.

4. 4 ASSEMBLING THE ”MOV" INSTRUCTION MOV destination, immediate value MOV AX,immed. B8h1011 1000 MOV CX,immed. B9h1011 1001 MOV DX,immed. BAh1011 1010 MOV BX,immed. BBh1011 1011 MOV SP,immed. BCh1011 1100 MOV BP,immed. BDh1011 1101 MOV SI,immed. BEh1011 1110 MOV DI,immed. BFh1011 1111 I R

5. 5 ASSEMBLING THE ”MOV" INSTRUCTION MOV destination, immediate value The formal description of MOV immediate is: 1 0 1 1 w reg data data if w=1 Example: MOV AX,FF00 = B8 00 FF 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 w reg data data where w = word flag Note “backwords” storage of data bytes

6. 6 ASSEMBLING THE ”MOV" INSTRUCTION MOV destination, immediate value Consider: MOV AL,FF = B0 FF 1 0 1 1 0 0 0 0 1 1 1 1 1 1 1 1 w reg data The 8-bit registers are designated: AL000AH100 CL001CH101 DL010DH110 BL011BH111

7. 7 ASSEMBLING THE ”MOV" INSTRUCTION MOV destination, immediate value MOV AL,immed. B0h1011 0000 MOV CL,immed. B1h1011 0001 MOV DL,immed. B2h1011 0010 MOV BL,immed. B3h1011 0011 MOV AH,immed. B4h1011 0100 MOV CH,immed. B5h1011 0101 MOV DH,immed. B6h1011 0110 MOV BH,immed. B7h1011 0111 I R

8. 8 ASSEMBLING THE ”MOV" INSTRUCTION MOV register, register 1 0 0 0 1 0 d w mod reg r/m operation code EA byte w = word flag: w=0: byte; w=1: word d = direction flag: d=1: reg is destination d=0: r/m is destination mod = mode indicator: 4 possible values: 00, 01, 10, 11 reg = register r/m = register or memory indicator EA = effective address: “move what to where”

9. 9 ASSEMBLING THE ”MOV" INSTRUCTION MOV register, register Examples: MOV BX,BP 1 0 0 0 1 0 1 1 1 1 0 1 1 1 0 1 8B DD d w mod reg = r/m = BX BP MOV BP,BX 1 0 0 0 1 0 1 1 1 1 1 0 1 0 1 1 8B EB d w mod reg = r/m = BP BX MOV BP,BX 1 0 0 0 1 0 0 1 1 1 0 1 1 1 0 1 89 DD d w mod reg = r/m = BX BP

10. 10 ASSEMBLING THE ”MOV" INSTRUCTION MOV register, register Consider 8-bit registers: MOV BL,CH 1 0 0 0 1 0 1 0 1 1 0 1 1 1 0 1 8A DD d w mod reg = r/m = BL CH

11. 11 ASSEMBLING THE ”MOV" INSTRUCTION MOV register, memory or MOV memory, register 1 0 0 0 1 0 d w mod reg r/m LSB of offset MSB of offset 1 0 0 0 1 0 1 1 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 d w mod reg r/m LSB of offset MSB of offset MOV BX,[F000] = 8B 1E 00 F0 mod=00 and r/m=110 signify the bytes following the EA byte are an offset address Implied segment is DS: DS:[F000] Note “backwords” storage of F000.

12. 12 ASSEMBLING THE ”MOV" INSTRUCTION MOV register, memory or MOV memory, register MOV [F000],BX Move the contents of register BX to location DS:F000 1 0 0 0 1 0 0 1 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 F F F F 0 0 0 0 d w mod reg r/m LSB MSB ADD [F000],BX Add register BX to the contents of location DS:F000 CMP CX,[0080] Compare register CX with the byte at location DS:0800

13. 13 ASSEMBLING THE ”MOV" INSTRUCTION MOV register, memory or MOV memory, register MOD=00 (and R/M isn't 110) In this case r/m specifies a register in which to find an address, as in: mod reg r/m MOV AX,[SI] 1 0 0 0 1 0 1 1 0 0 0 0 0 1 0 0 d w AX -----SI---- "Move the contents of the address in SI to AX." The three registers that may be used in this way, along with their r/m values are: 100=SI, 101=DI, 111=BX.