1. Advance Nano Device Lab. Fundamentals of Modern VLSI Devices 2 nd Edition Yuan Taur and Tak H.Ning 0 Ch4.2 Threshold Voltage

2. Advance Nano Device Lab. Off-current and Standby Power 1

3. Advance Nano Device Lab. On-current and MOSFET Performance 2

4. Advance Nano Device Lab. 3

5. 4

6. CMOS Design Considerations 5

7. Advance Nano Device Lab. CMOS Design Considerations 6

8. Advance Nano Device Lab. Trends of Power Supply Voltage and Threshold Voltage 7

9. Advance Nano Device Lab. 8 Trends of Power Supply Voltage and Threshold Voltage

10. Advance Nano Device Lab. Effect of Gate Work Function 9

11. Advance Nano Device Lab. Effect of Gate Work Function 10

12. Advance Nano Device Lab. Channel Profile Requirement and Trends 11

13. Advance Nano Device Lab. Integral Solution to Poisson’s Equation 12

14. Advance Nano Device Lab. A High-Low Step Profile 13

15. Advance Nano Device Lab. A High-Low Step Profile 14

16. Advance Nano Device Lab. 9.3.2 Threshold Voltage 15

17. Advance Nano Device Lab. A High-Low Step Profile 16

18. Advance Nano Device Lab. Generalization to a Gaussian Profile 17

19. Advance Nano Device Lab. Generalization to a Gaussian Profile 18

20. Advance Nano Device Lab. Retrograde (Low-High) Channel Profile 19

21. Advance Nano Device Lab. Extreme Retrograde Profile and Ground-Plance MOSFET 20

22. Advance Nano Device Lab. 21 Extreme Retrograde Profile and Ground-Plance MOSFET

23. Advance Nano Device Lab. 22 Extreme Retrograde Profile and Ground-Plance MOSFET

24. Advance Nano Device Lab. 9.3.2 Threshold Voltage 23

25. Advance Nano Device Lab. Counter-Doped Channel 24

26. Advance Nano Device Lab. Counter-Doped Channel 25

27. Advance Nano Device Lab. Laterally Nonuniform Channel Doping 26

28. Advance Nano Device Lab. 9.2 Ion Implantation and Substrate Nonuniformity 27

29. Advance Nano Device Lab. Future Transistors 201020152020 2025 1971 Complexi t y ≈ Evolutionary Revolutionary 2014 Short CourseGreg Yeric 11

30. Advance Nano Device Lab. 2014 Short CourseGreg Yeric 73 Need to increase current densityas theFETs scale Ge PMOS III-V NMOS G e, InGaAs  vs. density of states Bandgap: BTBT, GIDL Oxides Quantum wells See Session 25

31. Advance Nano Device Lab. 72 2014 Short CourseGreg Yeric 722014 Short CourseGreg Yeric Your Device IMEC. VLSI 2014 “7nm FinFETs” Technology14nm10nm7nm5nm VDDV0.80.70.650.6 Gate Pitchnm80644834 Metal Pitchnm64483625 Channel Lengthnm24201410 EOT + dark spacenm1.21.1 1.0 Fin pitchnm48362719 Max. fins per FET4444

32. Advance Nano Device Lab. No two identically designed transistors are alike anymore! Asenov et al, IEDM 2008  V T ~ 1/(WL) 1/2 100 The established simulation para digm Physical gate length 22nm atoms Failures shift from catastrophic to time-dependent variability This needs adaptations in circuit design to account for statistical spread in device parameters Physical gate length 9nm = 30x30x30 8 Challenges of 7nm CMOS Technology

33. Advance Nano Device Lab. Deeply-scaled Device operation becomes more and more affected by Individual defects In deeply-downscaled technologies, only a handful of random defects will be present in each device 72 Challenges of 7nm CMOS Technology N ot = 10 12 cm -2  N T ~ 10 if device area = 10 x 100 nm 2 Numb er of charged defects will be increasing with operating time  time-dependent variability in addition to time-0 variability Courtesy of M. Bina, TUWien

34. Advance Nano Device Lab. Quantum Effect on Threshold Voltage 33

35. Advance Nano Device Lab. Quantum Effect on Threshold Voltage 34

36. Advance Nano Device Lab. Triangular Potential Approximation for the Subthreshold Region 35

37. Advance Nano Device Lab. Triangular Potential Approximation for the Subthreshold Region 36

38. Advance Nano Device Lab. Threshold-Voltage Shift Due to Quantum Effect 37

39. Advance Nano Device Lab. Quantum Effect on Inversion-Layer Depth 38

40. Advance Nano Device Lab. A Simple First-Order Model 39

41. Advance Nano Device Lab. Discrete Dopant Effects in a Retrograde-Doped Channel 40