1. Assaf Shacham, Keren Bergman, Luca P. Carloni Presented for HPCAN Session by: Millad Ghane NOCS’07

2.  Scaling Transistor Speed and Integrity  Tighter Logic  Power Dissipation  Increasing Number of Cores per Chip  Bottleneck: Global Intrachip Communications ▪ Bandwidth ▪ Power  Performance-per-watt

3.  Low Power Dissipation  Ultra-high Throughput  Minimal Latency  End-to-end Transmission  No Repeating  No Regeneration  No Buffering A silicon ring resonator

4.  Photonic Interconnection  High Bandwidth Messages  Electronic Interconnection  Low Bandwidth Messages  Short Control Messages

5.  Advantages  Bit-rate Transparency ▪ Not Switching by Every Bit of Data ▪ Switching Once per Message  Low Loss in Optical Waveguide ▪ Independence of Transmission Distance  Disadvantages  No Storage Element  E/O and O/E Conversions ▪ Off-chip Lasers

6. D D S Sending path-setup packet Electronic Network Optic Network S

7. D S D S Sending optical packet

8. D S D S Sending path-teardown packet

9. D S D S Sending path-blocked packet path-teardown packet

10. 70 µm Photonic Switching Element Electrical Router

11.  No Injection/Ejection Port  Not Deadlock-Free  Wide Turns

12. Injection Torus Address Ejection Gateway Switch Injection Switch Ejection Switch Torus Network Nodes Access Points Address Format

13.  Injection-Ejection Blocking  [previous slide]  Intra-dimentional Blocking (Torus Network)  Virtual Channel Flow Control ▪ Circuit Switching  terminate-on-timeout packet

14.  POINTS Simulator  Based on OMNET++  36-core CMP  6x6 planar  Chip size: 20 x 20 mm  Uniform Traffic  3 Cases  Deadlock  Message Size Optimization  Increasing Path Diversity 2

15.  Long path-setup latency  Nonoseconds  Super fast transmission Overhead Ratio:

16.  Message Duration: 50ns  Message Size: 2KB Suitable for DMA Trans

17.  PD=2  Less Hardware  Less Overhead Difference