Presentation is loading. Please wait.

Presentation is loading. Please wait.

CSE 3322 Computer Architecture Dr. John Patterson 614 NH Office Hours: M, W 11 –12 noon 817-272-3679 Grading Policy: Project 25%

Similar presentations


Presentation on theme: "CSE 3322 Computer Architecture Dr. John Patterson 614 NH Office Hours: M, W 11 –12 noon 817-272-3679 Grading Policy: Project 25%"— Presentation transcript:

1 CSE 3322 Computer Architecture Dr. John Patterson 614 NH Office Hours: M, W 11 –12 noon 817-272-3679 john.patterson@uta.edu Grading Policy: Project 25% Exam I 25% Exam III 25% Homework 5% add on Turn in start of class – no late homework Exam II 25%

2 CSE 3322 Computer Architecture Course WEB SITE crystal.uta.edu/~jpatters

3 “If we don’t succeed, we run the risk of failure.” Bill Clinton

4 CSE 3322 Computer Architecture The Low Level knowledge needed by High Level Programmers

5 Five Components of Computers Input Output Memory Control Datapath Processor

6 Input Instructions Input Output Memory Control Datapath C=A+B A B C

7 Fetch Instructions Input Output Memory Control Datapath C=A+B A B C ADD A,B

8 Fetch Operands Input Output Memory Control Datapath C=A+B A B C ADD A,B A,B

9 Execute Command Input Output Memory Control Datapath C=A+B A B C ADD A,B A+BA+B

10 Store Results & Output Input Output Memory Control Datapath C=A+B A B A+B ADD A,B A+BA+B

11 Input Output Memory Control Datapath C=A+B A B A+B ADD A,B A+BA+B Some Architecture Considerations Integer or Floating Point Number of Operands

12 Architecture Design Criteria Performance

13 Architecture Design Criteria Performance Hardware Costs

14 Architecture Design Criteria Performance Hardware Costs Performance

15 Architecture Design Criteria Performance Hardware Costs Performance Instruction Complexity

16 Architecture Design Criteria Performance Hardware Costs Performance Instruction Complexity Hardware Software Trade-Offs

17 Architecture Design Criteria Performance Hardware Costs Performance Instruction Complexity Hardware Software Trade-Offs Etc., Etc., Etc.

18 Evolution of Registers in Datapath Accumulator ADD 300Add the contents of memory location 300 to the Accumulator A + Memory[300] A A Ex: 32 Flip-Flops

19 Evolution of Registers in Datapath Accumulator ADD 300 A + Memory[300] A A Special Registers were added with special functions Ex: 32 Flip-Flops

20 Evolution of Registers in Datapath Accumulator ADD 300 A + Memory[300] A A Special Registers were added with special functions Ex: 32 Flip-Flops Models or Abstractions

21 Evolution of Registers in Datapath 32 General Purpose Registers

22 Evolution of Registers in Datapath 32 General Purpose Registers Called a Load-Store or Register-Register machine

23 Evolution of Registers in Datapath 32 General Purpose Registers Called a Load-Store or Register-Register machine All Registers can be used for any purpose

24 Evolution of Registers in Datapath 32 General Purpose Registers Called a Load-Store or Register-Register machine All Registers can be used for any purpose Ex: Add any two Registers and put the result in a third Register

25 Instruction Set Architecture Consists of All of the Instructions and How Each Works

26 Instruction Set Architecture Consists of All of the Instructions and How Each Works Models or Abstractions

27 Instruction Set Architecture Consists of All of the Instructions and How Each Works Is the Interface Between Hardware and Software

28 Instruction Set Architecture Consists of All of the Instructions and How Each Works Is the Interface Between Hardware and Software Defines the Functionality

29 Instruction Set Architecture Consists of All of the Instructions and How Each Works Is the Interface Between Hardware and Software Defines the Functionality Determines the Inherent Performance

30 Instruction Set Architecture Consists of All of the Instructions and How Each Works Is the Interface Between Hardware and Software Defines the Functionality Determines the Inherent Performance Determines the Software Compatibility

31 Software Hierarchical Layers Machine Instruction 101110001100010000001

32 Software Hierarchical Layers Machine Instruction 101110001100010000001 Assembly Language add $2, $5,$2 Assembler

33 Software Hierarchical Layers Machine Instruction 101110001100010000001 Assembly Language add $2, $5,$2 High Level Language g = h + A[8] Assembler Compiler

34 Software Hierarchical Layers Machine Instruction 101110001100010000001 Assembly Language add $2, $5, $2 High Level Language g = h + A[8] Assembler Compiler Models or Abstractions

35 Why Study Computer Architecture Learn to Design Computers –Processors Designed by Few Semiconductor Companies

36 Why Study Computer Architecture Learn to Design Computers –Processors Designed by Few Semiconductor Companies Learn to Design Device Controllers

37 Why Study Computer Architecture Learn to Design Computers –Processors Designed by Few Semiconductor Companies Learn to Design Device Controllers Learn to Design More Optimum Software!

38 Why Study Computer Architecture Learn to Design Computers –Processors Designed by Few Semiconductor Companies Learn to Design Device Controllers Learn to Design More Optimum Software! Learn to Design More Optimum Systems!


Download ppt "CSE 3322 Computer Architecture Dr. John Patterson 614 NH Office Hours: M, W 11 –12 noon 817-272-3679 Grading Policy: Project 25%"

Similar presentations


Ads by Google