2. ICC Module 3 Lesson 1 – Computer Architecture 1 / 9 © 2015 Ph. Janson Information, Computing & Communication Computer Architecture Clip 7 – Architectural Parallelism School of Computer Science & Communications P. Ienne (charts), Ph. Janson (commentary)

3. ICC Module 3 Lesson 1 – Computer Architecture 2 / 9 © 2015 Ph. Janson Outline ►Clip 0 – IntroductionClip 0 ►Clip 1 – Software technology – Assembler languageClip 1  Algorithms  Registers  Data instructions  Instruction numbering  Control instructions ►Clip 2 – Hardware architecture – Von Neumann’s stored program computer architectureClip 2  Data storage and processing  Control storage and processing ►Clip 3 – Hardware design – Instruction encodingClip 3 ►Harware implementation – Transistor technology  Clip 4 – Computing circuits Clip 4  Clip 5 – Memory circuits Clip 5 ►Hardware performance  Clip 6 – Logic parallelism Clip 6  Clip 7 – Architecture parallelism Clip 7 First clipPrevious clipFirst clipPrevious clipNext clip

4. ICC Module 3 Lesson 1 – Computer Architecture 3 / 9 © 2015 Ph. Janson Two simple examples of performance increase: 1.At the circuit level Reducing the delay of an adder 2.At the processor structure level Increasing the throughput of instructions => this clip How can one increase performance beyond transistor speed ? t = Reduce delay waiting to get a result = Increase throughput number of results per time unit t

5. ICC Module 3 Lesson 1 – Computer Architecture 4 / 9 © 2015 Ph. Janson Our processor … Arithm. unit 103: loadr1, 0 104: loadr2, -21 105: addr3, r7, r4 106: multr2, r5, r9 107: subr8, r7, r9 108: loadr9, r4 109: addr3, r2, r1 110: subr5, r3, r4 111: loadr2, r3 112: addr1, r2, -1 113: addr8, r1, -1 114: divr4, r1, r7 115: loadr2, r4 Loadr1, 0 Loadr2, -21 Addr3, r7, r4 Multr2, r5, r9 Subr8, r7, r9 Loadr9, r4 … executes normally one instruction at a time Can we do better ?

6. ICC Module 3 Lesson 1 – Computer Architecture 5 / 9 © 2015 Ph. Janson 103: loadr1, 0 104: loadr2, -21 105: addr3, r7, r4 106: multr2, r5, r9 107: subr8, r7, r9 108: loadr9, r4 109: addr3, r2, r1 110: subr5, r3, r4 111: loadr2, r3 112: addr1, r2, -1 113: addr8, r1, -1 114: divr4, r1, r7 115: loadr2, r4 Arithm. unit Arithm. unit Doubling the throughput of our processor Loadr1, 0Loadr2, -21 Addr3, r7, r4Multr2, r5, r9 Subr8, r7, r9Loadr9, r4 We could imagine executing two instructions at a time! Do you see the problem ?!

7. ICC Module 3 Lesson 1 – Computer Architecture 6 / 9 © 2015 Ph. Janson 103: loadr1, 0 104: loadr2, -21 105: addr3, r7, r4 106: multr2, r5, r9 107: subr8, r7, r9 108: loadr9, r4 109: addr3, r2, r1 110: subr5, r3, r4 111: loadr2, r3 112: addr1, r2, -1 113: addr8, r1, -1 114: divr4, r1, r7 115: loadr2, r4 Arithm. unit Arithm. unit Doubling the throughput of our processor Add r3, r2, r1 Add r5, r3, r4 The problem is that the 2 nd instruction needs a value computed by the 1 st instruction! Unless one is careful the result will be wrong ! Do you see the problem ?!

8. ICC Module 3 Lesson 1 – Computer Architecture 7 / 9 © 2015 Ph. Janson 103: loadr1, 0 104: loadr2, -21 105: addr3, r7, r4 106: multr2, r5, r9 107: subr8, r7, r9 108: loadr9, r4 109: addr3, r2, r1 110: subr5, r3, r4 111: loadr2, r3 112: addr1, r2, -1 113: addr8, r1, -1 114: divr4, r1, r7 115: loadr2, r4 Arithm. unit Arithm. unit Doubling the throughput of our processor Addr3, r2, r1 Subr5, r3, r4Loadr2, r3 Addr1, r2, -1 Addr8, r1, -1Divr4, r1, r7 NOTHING In practice one executes between one and two instructions at a time and then the result is correct

9. ICC Module 3 Lesson 1 – Computer Architecture 8 / 9 © 2015 Ph. Janson A “superscalar” processor Arithm. unit Arithm. unit Arithm. unit Arithm. unit Register bank Dependency detection ►All modern processors for portable computers as well as servers include this ►in addition they reorder and execute instructions before knowing whether they need to be (for instance after an instruction such as jump_lte )

10. ICC Module 3 Lesson 1 – Computer Architecture 9 / 9 © 2015 Ph. Janson ►One can modify the structure of a system to execute programs faster ►One can add resources to processors to make then faster ►Or one can use simpler processors to spare energy Performance engineering (2) This is an example of computer architecture, which is another branch of Computer Engineering