1. SECON 2012 Final Presentation

2. Team Michael Helmbrecht Electrical Engineer Measurement Tasks Course Construction Chris Nicholas Computer Engineer Measurement Tasks Course Construction Kristin Sharp Electrical Engineer Measurement Tasks Course Construction Ryan Rougeau Electrical Engineer Navigation PCB Design Erin Tate Electrical Engineer Navigation PCB Design Jason Warren Computer Engineer Navigation PCB Design Dr. Robert Reese Advisor

3. Outline Competition Overview Practical Constraints & Related Testing Technical Constraints & Related Testing System Testing Summary & Future Goals

4. Outline Competition Overview – Playing Field – Tasks – Scoring Preliminary Rounds Final Rounds

5. Playing Field Carpet with white tape Task Boxes 4-Minute Rounds

6. Tasks Approach Task Box Take Measurement Make Decision Repeat

7. Scoring Qualifying Round: – Push start and move 1 ft. Preliminary Rounds: 3 Rounds – Average of the three scores – Top 6 teams advance to finals Final Round: – Team with highest score wins Points: – 100 initial points per round – +10 points for correct decisions – –10 points for incorrect decisions

8. Outline Practical Constraints & Related Testing – Modular Design PCB parts placed with headers FSM coding style – Troubleshooting Bluetooth and debugging testing

9. Modular Design PCB Layout PCB PIC24 Breakout Board Bluetooth Module Motor Control Breakout Board

10. Modular Design FSM Coding Style – Separate states for Navigation and Measurement programming

11. Troubleshooting Bluetooth and Debugging Testing – Bully Bootloader COM ports

12. Outline Technical Constraints & Related Testing – Voltage – Capacitance – Temperature – Waveform – Navigation

13. Voltage Testing

15. Plate VoltageMeasured VoltageMultimeter ReadingPercent Error 15V3.08V3.16V2.5% 11V2.68V2.76V3.0% 9V2.48V2.55V2.7% 0V1.59V1.64V3.0% -9V0.70V0.73V4.0% -11V0.50V0.53V5.7% -15V0.10V0.12V16.7% MAX VOLTAGEMIN VOLTAGETHRESHOLDS 15V-15V9V < V < 11V

16. Capacitance Testing

18. Plate CapacitanceMeasured CapacitancePercent Error 10.7μF11.4μF6.5% 1.01μF1.06μF5% 46.9nF56.9nF21% MAX CAPACITANCEMIN CAPACITANCETHRESHOLDS 10.0μF10.0nF100nF< C < 1μF

19. Temperature Testing

20. Plate TemperatureMeasured Plate TemperatureMeasured Ambient Temperature 68.7  F69.7  F76.4  F 75.0  F75.6  F76.4  F 89.6  F 76.4  F 102  F 76.4  F

21. Waveform Testing Output waveform Input waveform V ref + -

22. Waveform Testing

23. Square Wave Sawtooth Wave V ref

24. Navigation Testing Line Sensing Distance Sensing

25. Line Sensor Testing Sensor Mounting

26. Line Sensor Testing Proportional Drive -4-3-2-11234 Each sensor has: – Priority – Weight

27. Line Sensor Testing LabVIEW Debug

28. Line Sensor Testing Test TypeLaps AttemptedLaps SuccessfulRate of Success Initial Line Following: Non- Latching 251248% Post-Debugging: Latching 252184% Discovered a latching turn state helped stay on line

29. Distance Sensor Testing Location Actual Distance (cm) Test 1 Count Test 2 Count Test 3 Count Test 4 Count Test 5 Count Average Count Out of Range > 17537580736870 Stop Line 11.2354297362309312327 Contact with Box 1.8703688633629641659

30. Outline System Testing – Integration testing – Demo video

31. System Testing Integration of both subsystems Ensure probes are accurate and relays switch correctly Measurement must be taken once box is reached and before decision is made

32. System Testing

33. Outline Summary & Future Goals – Timeline – Future goals Fix Bugs Populate PCB Improve performance

34. Timeline AugustSeptemberOctoberNovemberDecember Strategy and Course Construction Research and Purchasing Programming Circuit Design Debugging Prototype

35. Fix Bugs Three bugs to correct – Measurement Transition between tests – Navigation Right turn problem Box approach error

36. Populate PCB

37. Improve Performance Balance speed with reliability of navigation and measurements Improve measurement accuracy Finalize entire package – Sensor and probe location – Mounting of PCB

38. SECON 2012 Final Presentation