1. 1 Final Project Multimedia Architecture and Processing Laboratory 多媒體架構與處理實驗室 Ph.D Chih-Hung Li ( 李志鴻 ) chihhung.li@gmail.com 2007 Spring Term

2. 2 Goal u Create the platform of JPEG decoder  Codes of all peripherals are provided  All peripherals are AMBA-compliant devices  2 image files are given u Build& run the simulation u Usage of analysis tools  Analysis the platform as much as you can  Describe the differences between 2 image files u Modify the platform to speed up the performance  Modify the SystemC code  Change bus architecture  Find the best FIFO size within LCD wrapper

3. 3 Platform Description

4. 4 Boot up

5. 5 ARM configs each module

6. 6 DMA transfers a input data

7. 7 ARM decodes the input data in parallel

8. 8 LCD Controller gets reconstructed data

9. 9 Notification of end of file

10. 10 Frame buffer inverted

11. 11 Other details u Clock period for LCD Ctrl = 80 ns u Clock period for other module = 8 ns LCD Controller Wrapper LCD PanelfifoLCD Controller