1. REFERENCE CIRCUITS
A reference circuit is an independent voltage or current source which has a high degree of precision and stability.
Output voltage/current should be independent of power supply.
Output voltage/current should be independent of temperature.
Output voltage/current should be independent of processing variations.

2. I-V curves of ideal references

3. Concept of Sensitivity
Let
Then:
is called the sensitivity of y with respect to xi

4. Total percentage change in y =
Sensitivity w.r.t. x1 * percentage change in x1
+ Sensitivity w.r.t. x2 * percentage change in x2
+ ……
Goal: Design reference circuits so that the reference’s sensitivities w.r.t. various variations are minimized.

5. Types of commonly used references
Voltage dividers - passive and active.
MOS diode reference.
PN junction diode reference.
Gate-source threshold reference circuit.
Base-emitter reference circuit.
Thermo voltage reference circuit
Bandgap reference circuit

6. Typical variations affecting the references
Power supply variation (main concern here)
Load variation (want ro=∞ for I-ref, ro=0 for V-ref)
Temperature variation (main concern also)
Processes variation (use good process and layout)
Interferences and noise (not considered here)

7. rather than sensitivity
For temperature variation, typically use fractional temperature coefficient:
TCF =
rather than sensitivity =

8. Voltage references Passive Divider Limited accuracy, ~6-bit, or 2%
Large static power
for small ro
Large area
Power sensitivity =1
Temp coeff depends on material

9. These can be used as “start up” circuits.
Active Dividers
These can be used as “start up” circuits.

10. PN Junction Voltage References=
If VCC = 10V, R = 10 kW, and IS = 10-15A, then =

11. Taking ∂/∂T and using: VCC − VREF + kT/q ≈ VCC − VREF:
For a diode:
Taking ∂/∂T and using: VCC − VREF + kT/q ≈ VCC − VREF:
TCF≈ =
where VGO = V is the bandgap voltage of silicon.
If VREF = VBE = 0.6V, TCF of R = 1500 ppm,
then TCF of VREF = ppm/oC

12. HW: Calculate
Calculate TCF

13. MOS equivalent of VBE reference:

15. The sensitivity w.r.t. VDD:
If VDD = 10V, W/L = 10, R = 100kW,and using parameters from Table3.1-2,
then VREF = 1.97V and
= 0.29
This is not nearly as good as the VBE reference.

16. For temperature coefficient
mo = KT-1.5 ; VT = VT0 - aT or VT(T) = VT(To) - a(T-To)

17. Solving for ∂VREF/∂T and computer TC:
The book has one example of using this.

18. Widlar current source
Vgs1-Vgs2-IoutR2=0
IoR2 +rt(Io/b2)-VEB1=0
Rt(Io)=(rt(1/b2 +4R2VEB2)-rt(1/b2))/2R2

19. Peaking current source:
Vgs1-IinR-Vgs2=0
VEB2=VEB1-IinR
Io=b2*VEB2^2=b2*(VEB1-IinR)^2
VEB1 = rt(Iin/b2) is determined by Iin and (W/L)1
If VD1 is small, M2 is in weak inversion. If Iin is very small, M1 is in weak or moderate inversion.

21. VGS based Current reference
MOS version: use VGS to generate a current and then use negative feed back stabilize i in MOS
Start up
Current mirror
VGS

22. Why the start up circuit?
There are two possible operating points:
The desired one and
The one that gives I1 = I2 = 0.
At power up, I1 = I2 = 0 without the start up.
RB bias M6 to be on, which turns M2 and M1 on.

23. Considering the l-effect, (1) is more like:
Then:
Differentiating wrt VDD and assuming constant VDS1 and VGS4 gives the sensitivity of IOUT wrt VDD.

24. HW: Verify the following sensitivity expression:
HW: Find approximately the temperature coefficient of Iout

26. Start up

27. Start up
Current mirror
VGS

28. Need to add start-up circuit
Add MOSCAPs between VBP and VDD, and between VBN and VSS
NMOS W ratio and R determines current value
Cascode to improve supply sensitivity
Or use a regulated amp
VBN and VBP may be directly used as biasing voltage for non-critical use

29. Cascode version
VDD-Vss must be large enough

30. Cascode version for low voltage
1/5(W/L)p
1/5(W/L)N
K(W/L)N

31. Select Iref (may be given)
Sample design steps:
Select Iref (may be given)
Assume all transistors except those arrowed have the same VEB.
VBN = VSS+VTN+VEB;
VBNC = VSS+VTN+VEB*rt(5);
VBP = VDD-|VTP|-VEB;
VBPC = VDD-|VTP|-VEB*rt(5).
At VDDmin, Needs all transistors in saturation.
For PMOS, need VBN < VBPC+|VTP| = VDDmin-VEB*rt(5). VEB < (VDDmin-VSS-VTN)/(1+rt(5)).
For NMOS, need VBP>VBNC-VTN, VDDmin-|VTP|-VEB > VSS+VEB*rt(5).  VEB < (VDDmin-VSS-|VTP|)/(1+rt(5)).
Since |VTP| is typically larger, so choose the second one. VEB ≈< (VDDmin-VSS-|VTP|)/(1+rt(5)).
With given VEB and Iref, all (W/L)’s can be determined.
Choose K and R: Iref*R=VEB – VEB/rt(K), so R = (1-1/rt(K))*VEB/Iref. Choose K so that a) R size is not too large and b) R+1/gmn/rt(K) is quite bit larger than 1/gmn.

32. VEB based current reference
Start up
VEB=VR

33. A cascoded version to increase ro and reduce sensitivity:
Requires start up
Not shown here
VEB reference

34. HW:
Analyze the sensitivity of the output I with respect to VDD and temperature.
Come up with a start up circuit for the circuit on the previous slide, using only active resisters without RB. Note that you need to make sure that at the desired operating point, the connection from the start up circuit should be turned off.

35. A thermal voltage based current reference
I1 = I2,  J1 = KJ2,
but J = Jsexp(VEB/Vt)
 J1/J2 = n =
exp((VEB1─ VEB2)/Vt)
 VEB1─ VEB2 = Vt ln(n)
I = (VEB1─ VEB2)/R
= Vt ln(n)/R  Vt = kT/q

36. A band gap voltage reference
Vout = VEB3 + I*x*R = VEB3 + (kT/q)*xln(n)
Vout/T = VEB3/T + (k/q)*xln(n)
At room temperature, VEB3/T = ─2.2 mV/oC,
k/q = mV/oC.
Hence, choosing appropriate x and n can make
Vout/T=0
When this happens, Vout = 1.26 V

37. Converting to current