1. – 1 – CSCE 211H Fall 2015 Lecture 5 Combinational Components Topics Products-of-Sums Form examples 5 variable and larger Karnaugh Maps Components: Decoders, MultiplexersReadings September 21, 2015 CSCE 211 Digital Design

2. – 2 – CSCE 211H Fall 2015 Overview Last Time: Boolean Algebra Continued Combinational Circuit Analysis Sums-of-Products Form Karnaugh Maps 3,4 variable maps Don’t Care Conditions Products-of-Sums FormNew: Review Products-of-Sums Form (5, 6, … variable maps) Decoders Multiplexers Circuits kits on paper

3. – 3 – CSCE 211H Fall 2015 Karnaugh Map Simplification F(W,X,Y,Z) = YZ WX 00 01 11 10 00 01 11 10 Z W X Y

4. – 4 – CSCE 211H Fall 2015 Karnaugh Map Simplification F(W,X,Y,Z) = YZ WX 00 01 11 10 00 01 11 10 Z W X Y

5. – 5 – CSCE 211H Fall 2015 Products-of-Sums Simplification F(W,X,Y,Z) = YZ WX 00 01 11 10 00 01 11 10 Z W X Y

6. – 6 – CSCE 211H Fall 2015 5 Variable Map Simplification F(V, W,X,Y,Z) = YZ WX 00 01 11 10 00 01 11 10 Z 04128 15139 371511 261410 W X Y YZ WX 00 01 11 10 00 01 11 10 Z0412815139 371511 261410 W X Y

7. – 7 – CSCE 211H Fall 2015 5 Variable Map Simplification F(V, W,X,Y,Z) = YZ WX 00 01 11 10 00 01 11 10 Z W X Y YZ WX 00 01 11 10 00 01 11 10 Z W X Y

8. – 8 – CSCE 211H Fall 2015 6 Variable Map F(U,V,W,X,Y,Z) = 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14

9. – 9 – CSCE 211H Fall 2015 6 Variable Map F(U,V,W,X,Y,Z) = 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14

10. – 10 – CSCE 211H Fall 2015 Combinational Circuits A combinational circuit is one that The outputs are functions strictly of the inputs There are no feedback loops

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18. – 18 – CSCE 211H Fall 2015 3x8 Decoder

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20. – 20 – CSCE 211H Fall 2015 4x16 decoder from 2x4s

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22. – 22 – CSCE 211H Fall 2015 Multiplexers A multiplexer selects one of its inputs to route to its outputs.

23. – 23 – CSCE 211H Fall 2015 BreadBoard

24. – 24 – CSCE 211H Fall 2015 Wiring an LED + - To wire an led 1.Hook the positive to Vcc 2.Hook the negative to a 330 ohm resistor 3.Hook the resistor to Gnd 4.Check for loose wires 5.Check for shorts See section 3.7.5 page 129-130 for more details I LED = 10 mA needed to light the LED Voltage drop is about 1.6V 303 Ohms

25. – 25 – CSCE 211H Fall 2015 74LS00 – Quad 2 input NAND

26. – 26 – CSCE 211H Fall 2015 74LS04 Hex Inverter

27. – 27 – CSCE 211H Fall 2015 Half adder  How many inputs?  How many outputs?

28. – 28 – CSCE 211H Fall 2015 6 Variable Map F(U,V,W,X,Y,Z) = 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14 0 1 3 2 4 5 7 6 8 9 10 11 12 13 15 14

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31. – 31 – CSCE 211H Fall 2015 Analyze This! 00110011 F1 = ? F2 = ? What are the delays?

32. – 32 – CSCE 211H Fall 2015 Quick What’s This?

33. – 33 – CSCE 211H Fall 2015 What’s This?

34. – 34 – CSCE 211H Fall 2015 8 to 1 Mux from 4x1 Muxes

35. – 35 – CSCE 211H Fall 2015 Big Multiplexers from smaller ones Show the design of a 32-to-1 Mux from 8-to-1’s and smaller muxes

36. – 36 – CSCE 211H Fall 2015 BreadBoard

37. – 37 – CSCE 211H Fall 2015 Wiring an LED + - To wire an led 1.Hook the positive to Vcc 2.Hook the negative to a 330 ohm resistor 3.Hook the resistor to Gnd 4.Check for loose wires 5.Check for shorts See section 3.7.5 page 129-130 for more details I LED = 10 mA needed to light the LED Voltage drop is about 1.6V 303 Ohms

38. – 38 – CSCE 211H Fall 2015 74LS00 – Quad 2 input NAND

39. – 39 – CSCE 211H Fall 2015 74LS04 Hex Inverter

40. – 40 – CSCE 211H Fall 2015 Two Bit adder  How many inputs?  How many outputs?  Do we have enough chips?

41. – 41 – CSCE 211H Fall 2015 Implementing a Binary Adder Using a Decoder PCXYSC 000 001 010 011 100 101 110 111 3x8 Decoder PC X Y

42. – 42 – CSCE 211H Fall 2015 74LS139 Decoder Dual 2x4 decoder

43. – 43 – CSCE 211H Fall 2015 Using a 74LS139 to implement a Half-adder XYXY SCSC

44. – 44 – CSCE 211H Fall 2015 74LS157 Dual 4 input Mux

45. – 45 – CSCE 211H Fall 2015 Hardware Description Languages Hardware description language or HDL is any language from a class of computer languages for formal description of electronic circuits Boolean Algebra was applied to circuits by Shannon 1948. http://cm.bell-labs.com/cm/ms/what/shannonday/paper.html Current HDLs include: Verilog HDL Verilog HDL VHDL – VHSIC HDL VHDL – VHSIC HDL VHSIC – Very High Speed Integrated Circuits ABEL HDL - Advanced Boolean Expression Language ABEL HDL - Advanced Boolean Expression Language http://en.wikipedia.org/wiki/Hardware_description_langu age http://en.wikipedia.org/wiki/Hardware_description_langu age

46. – 46 – CSCE 211H Fall 2015 Seven Segment Display Common anode Common anode

47. – 47 – CSCE 211H Fall 2015 Functions for 74LS47 with don’t cares a(D,C,B,A) = D + A. C + A. B + A’. C’ b(D,C,B,A) = D + (D'*C') + (A'*B') + (A*B) c <= d = e = A(bar) and (B or C(bar)) f = D + A'B' + B'C + A'BC g=D + B'C + C'B + A'B

48. – 48 – CSCE 211H Fall 2015 Karnaugh Map Simplification On a real 74LS47 the outputs for 10, …15 are not don’t cares. They would indicate errors in BCD input. We could use the period for that. period(D,C,B,A)=SUM( ) dc(D,C,B,A) = SUM( ) BA DC 00 01 11 10 00 01 11 10 A D C B period(D,C,B,A) =

49. – 49 – CSCE 211H Fall 2015 Transistors History 1790s Ben Franklin “assigns” negative charge to electrons 1898 Thompson discovers the electron 1947 Shockley, Bardeen and Brattain “invent” transistor 1958 first Integrated Circuit, Texas Instruments 1971 Intel 4004, microprocessor, Ted Hoff Timelinehttp://www.pbs.org/transistor/

50. – 50 – CSCE 211H Fall 2015 Hot Batteries You should regularly check your batteries “slightly warm” is OK but hot indicates that your circuit has a short circuit. Unplug quickly and check.  Look for direct lines Vcc to GND.  Remember you need 330 ohm resistors in series with LEDs and that includes segments of the seven segment display.  Recheck sections of the breadboard.

51. – 51 – CSCE 211H Fall 2015 Transistor: Water Flow Model Water flow in B raises the plunger so that water can flow from C to E. Small flow turns on and off bigger flow. Put signal on B, transfer signal C to E Reference: http://www.satcure-focus.com/tutor/page4.htm

52. – 52 – CSCE 211H Fall 2015 Transistor Terminology Conductor – electrons easily passed from one atom to next (copper every atom has loose electron) Insulator – electrons tightly tied down to atoms, no flow Semiconductor – by adding impurities (doping) can be changed to increase conductivity Silicon wafer – used for IC circuits N-type - silicon doped with boron (excess electrons) P-ype - silicon doped with phosphorous (excess “holes” lack of electrons)

53. – 53 – CSCE 211H Fall 2015 Transistor Reference: http://www.intel.com/education/transworks/

54. – 54 – CSCE 211H Fall 2015 Transistor Reference: http://www.intel.com/education/transworks/

55. – 55 – CSCE 211H Fall 2015 Transistor Reference: http://www.intel.com/education/transworks/ Put Positive charge on gate. This attracts electrons into gap. This allows electrons to pass freely through the gap.

56. – 56 – CSCE 211H Fall 2015 Transistor Reference: http://www.intel.com/education/transworks/

57. – 57 – CSCE 211H Fall 2015 Transistor Reference: http://www.intel.com/education/transworks/ Take positive charge off Gate This stops attracting electrons. This shuts off the flow.

58. – 58 – CSCE 211H Fall 2015 N channel transitor

59. – 59 – CSCE 211H Fall 2015 P channel Transistor

60. – 60 – CSCE 211H Fall 2015 CMOS Inverter

61. – 61 – CSCE 211H Fall 2015 CMOS NAND

62. – 62 – CSCE 211H Fall 2015 What’s This?

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