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System Buses Blane Adcock Eric Bartel Kevin Estep Jason Losco.

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Presentation on theme: "System Buses Blane Adcock Eric Bartel Kevin Estep Jason Losco."— Presentation transcript:

1 System Buses Blane Adcock Eric Bartel Kevin Estep Jason Losco

2 PC\AT Bus made backward compatible with older XT bus 8MHz bus with 16 bit data path maximum transfer 8Mb/second speed is independent of CPU speed became bottleneck because it couldn’t support much speed

3 MicroChannel Architecture released in 1987 by IBM 8MHz bus with 33Mb/sec throughput made bus proprietary no backwards compatibility with ISA MCA buses aren’t in use anymore

4 VESA Local Bus created to relieve bottleneck of slow ISA bus 32 bit path, supports speeds up to 33MHz primarily for use with 486 motherboard didn’t support plug and play phased out when Intel pushed PCI bus

5 ISA/EISA ISA introduced in 1982 –16 bits, 8MHz –1993 Plug and Play ISA bus EISA designed in 1987 by 9 IBM competitors –32 bit bus, 33Mb/sec throughput –Supported IRQ sharing

6 PCI Bus made in the early 90’s by Intel allows connected devices direct access to system memory can run in or out of synch with the system clock improved version can handle 66MHz speeds Supports BURST MODE

7 Accelerated Graphics Port interface used to allow 3D images on PC screens allows direct system memory access of textures supports BURST MODE and PIPELINING Graphics Address Re-mapping Table(GART)

8 Universal Serial Bus developed as fast cross-platform external bus supports plug and play and hot swapping can handle up to 128 devices, 1 being the hub high speed connections handle 12 Mb/sec uses small four pin connector

9 Firewire USB’s faster counterpart developed for graphical and other high speed applications capable of speeds up to 200 Mb/sec can handle up to 60,000 connections has peer to peer networking


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