1. Logic Design CS221 1 st Term 2009-2010 combinational circuits Cairo University Faculty of Computers and Information

2. 24/10/2009 cs221 – sherif khattab 2 Administrivia project ideas due next Saturday in paper  team name and list of project team members  logic circuit title: game, clock, calculator, etc.  short description project discussion: no lecture lab of next week: simple game

3. 24/10/2009 cs221 – sherif khattab 3 our story so far... digital circuit specification  inputs and outputs  truth table of each output  (or Boolean-algebraic representation)‏  don't -care conditions (if any)‏ truth table -> K-map K-map -> simplified algebraic expression algebraic expression -> gate implementation  AND-OR, OR-AND, NAND, NOR, XOR, etc. combinational circuits (today's lecture)‏  no memory

4. 24/10/2009 cs221 – sherif khattab 4 combinational circuits inputs outputs logic gates

5. 24/10/2009 cs221 – sherif khattab 5 combinational circuit representation if a combinational circuit has n inputs and m outputs, then it can be represented as:  m truth tables (how many rows in each table?)‏  m Boolean functions; one for each output

6. 24/10/2009 cs221 – sherif khattab 6 combinational circuits and memory in combinational circuits, outputs depend on present inputs combinational circuits have no memory of past inputs and outputs sequential circuits (described later) have memory (storage elements)‏

7. 24/10/2009 cs221 – sherif khattab 7 combinational circuit design digital circuit specification  inputs and outputs  truth table of each output  (or Boolean-algebraic representation)‏  don't -care conditions (if any)‏ truth table -> K-map K-map -> simplified algebraic expression algebraic expression -> gate implementation  AND-OR, OR-AND, NAND, NOR, XOR, etc. verification

8. 24/10/2009 cs221 – sherif khattab 8 example 1: decimal code conversion Design a circuit that converts BCD code into excess-3 code BCD code and excess-3 code both represent decimal numbers BCD code and excess-3 code both have 4 bits 1 in BCD is 0001 1 in excess-3 is 0100

9. 24/10/2009 cs221 – sherif khattab 9 step 1: specification how many input bits? how many output bits? truth table or Boolean expression for each output

10. 24/10/2009 cs221 – sherif khattab 10 step 1: specification don't- care

11. 24/10/2009 cs221 – sherif khattab 11 step 2: simplification K-map for each output

12. 24/10/2009 cs221 – sherif khattab 12 step 2: simplification

13. 24/10/2009 cs221 – sherif khattab 13 step 2: simplification

14. 24/10/2009 cs221 – sherif khattab 14 step 2: simplification

15. 24/10/2009 cs221 – sherif khattab 15 step 2: simplification

16. 24/10/2009 cs221 – sherif khattab 16 step 2: simplification

17. 24/10/2009 cs221 – sherif khattab 17 step 2: simplification

18. 24/10/2009 cs221 – sherif khattab 18 step 2: simplification

19. 24/10/2009 cs221 – sherif khattab 19 step 2: simplification

20. 24/10/2009 cs221 – sherif khattab 20 step 2: simplification algebraic manipulation K-map multiple simplified expressions; which one to choose?  fewer gates  fewer inputs per gate  propagation time through the gates (one-level, two- levels, etc.)‏  number of gates connected to one output  other criteria

21. 24/10/2009 cs221 – sherif khattab 21 step 3: implementation

22. 24/10/2009 cs221 – sherif khattab 22 step 3: implementation

23. 24/10/2009 cs221 – sherif khattab 23 step 3: implementation

24. 24/10/2009 cs221 – sherif khattab 24 step 3: implementation

25. 24/10/2009 cs221 – sherif khattab 25 step 3: implementation how many gates in total? how many levels?

26. 24/10/2009 cs221 – sherif khattab 26 step 3: implementation can we get fewer gates? z = D' w = A + BC + BD = A + B(C + D)‏ x = B'C + B'D + BC'D' = B'(C + D) + B (C+D)' y = CD + C'D' = CD + (C + D)'

27. 24/10/2009 cs221 – sherif khattab 27 step 3: implementation can we get fewer gates? z = D' w = A + BC + BD = A + B(C + D)‏ x = B'C + B'D + BC'D' = B'(C + D) + B (C+D)' y = CD + C'D' = CD + (C + D)'

28. 24/10/2009 cs221 – sherif khattab 28 step 3: implementation z = D'w = A + B(C + D)x = B'(C + D) + B (C+D)' y = CD + (C + D)' how many gates in total? how many levels?

29. 24/10/2009 cs221 – sherif khattab 29 step 3: implementation 7 AND + 3 OR 2 and 3 inputs per gate 2 levels 4 AND + 4 OR + 1 inverter 2 inputs per gate 4 levels which one is better?

30. 24/10/2009 cs221 – sherif khattab 30 step 4: verification For small circuits:  assign variable names to intermediate signals  derive truth table For large circuits  computer software

31. 24/10/2009 cs221 – sherif khattab 31 step 4: verification

32. 24/10/2009 cs221 – sherif khattab 32 example 2: binary adder Design a circuit that adds two n-bit binary numbers 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 carry Add two 5-bit numbers: 0 1 0 0 1 + 1 1 0 1 0 -------------- 110 0 1 0 1 1

33. 24/10/2009 cs221 – sherif khattab 33 example 2: binary add/subtract we can follow the same steps as before: step 1: specification  2n inputs  n+1 outputs  truth table step 2: simplification step 3: implementation

34. 24/10/2009 cs221 – sherif khattab 34 example 2: binary add/subtract we will take another approach  bottom-up approach  building circuit in blocks

35. 24/10/2009 cs221 – sherif khattab 35 smallest block: half-adder circuit that adds two bits (half-adder)‏ 2 inputs (x and y) and 2 outputs (Sum and Carry)‏

36. 24/10/2009 cs221 – sherif khattab 36 half-adder step 1: specification step 2: simplification  S = x'y + xy'  C = xy step 3: implementation

37. 24/10/2009 cs221 – sherif khattab 37 full-adder: one step up 3 inputs (two bits and carry)‏ 2 outputs: sum and carry

38. 24/10/2009 cs221 – sherif khattab 38 full-adder: one step up 3 inputs (two bits and carry)‏ 2 outputs: sum and carry implementation using half-adders x y z y S0S0 C0C0 half-adder 1 half-adder 0 S1S1 C1C1 S C

39. 24/10/2009 cs221 – sherif khattab 39 4-bit binary adder: one step up adds two 4-bit binary numbers (add an input carry)‏ K-map design: 9 inputs... too much

40. 24/10/2009 cs221 – sherif khattab 40 4-bit binary adder: one step up adds two 4-bit binary numbers (add an input carry)‏ using four full adders

41. 24/10/2009 cs221 – sherif khattab 41 example: binary subtractor subtracts two n-bit binary numbers how many inputs? outputs? 7 0111 0111 - 5 - 0101 +1010 ------ --------- + 1 --------- 10010 2's complement of 0101 7 0111 0111 - 9 -1001 + 0110 ------ --------- + 1 --------- 01110 2's complement of 1001

42. 24/10/2009 cs221 – sherif khattab 42 example: binary subtractor A – B = A + (1's complement of B) + 1 1

43. 24/10/2009 cs221 – sherif khattab 43 overflow if the sum of two n-bit numbers occupies n+1 bits, an overflow has occurred computers must detect overflow...why? we will add a circuit to detect overflow overflow detection depends on whether the two added numbers are signed or unsigned

44. 24/10/2009 cs221 – sherif khattab 44 overflow detection unsigned: end carry => overflow signed: last bit is the sign if the last two carries are equal => no overflow if the last two carries are not equal => overflow

45. 24/10/2009 cs221 – sherif khattab 45 overflow detection C3 XOR C4 = 1 when? C3 XOR C4 = 0 when? V (overflow detection) = C3 XOR C4