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CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group.

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Presentation on theme: "CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group."— Presentation transcript:

1 CF 16/Feb/20031 H8 Beam Test in 2003 ─ Preparation status TGC-Japan electronics group

2 CF 16/Feb/20032 To do list for beam test at H8 Validate the design of Muon Endcap Trigger Electronics With electronics and software, which have been used in the present slice test (s) of end-to-end full chain + LV + HV + DCS + others With TGC 7 layers using 3 T8 units Take data from TGCs together with ones from MDTs Integrate the system with MuCTPI and CTP

3 CF 16/Feb/20033 Trigger Electronics

4 CF 16/Feb/20034 Slice test results and status Level 1 Trigger electronics Comparison of trigger I/O patterns with Simulation 1-track hit 10000 patterns checked 2-tracks hits 10000 patterns checked ≥ 2 tracks hits check undergoing Latency (from pp collision to MuCTPI input) measured and estimated as 1205ns (TDR 1250ns) Read-out chain with SSW and Test-ROD FPGA version SSW ready, firmware not yet coded SSW must be installed in Slice test setup till 1 st week of March Test ROD functionality confirmed, performance measured with PT4 module (general purpose G-link test VME module)

5 CF 16/Feb/20035 Installation: on a doublet with special PS pack container PS-Pack (PS board, SPP) Some newer components for beam test PS board New PS boards (ready) for New PP ASICs –32 channel inputs –PRR passed New JRC ASICs –PRR passed Present SLB ASICs –Known bug (OK for the beam test) DCS (eLMB) Chamber Charge Monitor Low Voltage Vth JTAG Service Patch Panel (ready) TTCrx and fanout DCS to TTCrx setup

6 CF 16/Feb/20036 HS Crate (Hi-pT, SSW, HSC) H-pT 2 H-pT ASICs (W/S) Full spec., PRR passed G-link → SL SSW (2 boards for W/S) FPGA version Firmware is being coded HSC (↔ CCI) JTAG Configuration Completed but not full tested (needs SSW) eLMB (DCS) put on outside of H8

7 CF 16/Feb/20037 ROD crates Test ROD crate Test ROD Performance tested with slice test CCI Performance tested with slice test TTCvi TTCrx fan-out VME I/F via Bit3 and PC ROD crate ROD VME with RCP Put in H8 hut

8 CF 16/Feb/20038 DAQ Data from both RODs must be fed to ROB Two different S/Ws for two different ROD crates Run controller integration and database merging have been discussed in Roma in Jan. 2003 Common development environment/framework ATLAS Online Software 00.17.01 Common Database

9 CF 16/Feb/20039 Software components PCDAQ Online S/W servers Conf D.B Root controller Sync. controller TGC Root J controllerI controller

10 CF 16/Feb/200310 Schedule Slice test in KEK ( Now → 3 ~ 7 Mar.) SLB chip revision, bug fix and submit on Feb.,15 SSW firmware code completion and readout test with SSW and T-ROD till 7 Mar. Test setup with TGC in Kobe (3 → 19 Mar.) 3-10-15 Mar. Chamber + Electronics + DCS Integration Japanese TGC members + Nachman + Israeli Students 15-19 Mar. SSW-ROD + DAQ integration Japanese TGC members + Lorne + Daniel Beam Time at H8 (24 May → 3 June) Chamber Installation (15 Apr. → ) DAQ integration, Commissioning (15 May → )


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