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Digital Electronics
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Registers and Counters
Chapter 6 Registers and Counters
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Some Terminology A Register is a group of flip-flops. Each FF is capable of storing one bit of information A Shift Register is a register capable of shifting its binary information in or both directions A Counter is a register that goes through a prescribed sequence of states upon the application of input pulses
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A 4-bit Shift Register
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Copy Register A to B
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Universal Shift Register
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Universal Shift Register
Function Table Mode Control S S Register Operation No Change Shift Right Shift Left Parallel Load
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Binary Ripple Counter Counts in binary from 0000 through 1111 (16 states) The clock for the second T- FF comes from the output of the first T-FF etc. There is no common clock The count ripples through like a “bucket-brigade”. This can slow things down as the number of FF’s increases.
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Ripple Counter with D-FF
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BCD Ripple Counter Counts in BCD from 0000 through 1001 (10 states) a.k.a. “mod 10” or “decimal” counter The clock for the second T- FF comes from the output of the first T-FF etc. There is no common clock When the count is 1001 then Q8 =1 so Q2 stays at 0 which means Q4 stays at zero. Hence the next count is 0000
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4-bit Synchronous Binary Counter
Pin E is count enable feature. The clock is common for all 4 JK FF’s The “next stage” output is used to cascade another 4-bit counter to make an 8-bit counter E
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Binary Counter with Load
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Two BCD Counter Ideas Loads 0000 after Clears on seeing 1010
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VHDL for Binary Counter
module counter (Count,Load,IN,CLK,Clr,A,CO); input Count,Load,CLK,Clr; input [3:0] IN; //Data input output CO; //Output carry output [3:0] A; //Data output reg [3:0] A; assign CO = Count & ~Load & (A == 4'b1111); (posedge CLK or negedge Clr) if (~Clr) A = 4'b0000; else if (Load) A = IN; else if (Count) A = A + 1'b1; else A = A; // no change, default condition endmodule
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That’s All Folks!
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