1. USB Interface Used for the DHCAL DIF Inspired from Clement’s code Julie Prast, LAPP18/06/20081

2. Julie Prast, LAPP2

3. Firmware Schematics View USB interface - 1 SM for USB read (FPGA to PC) - 1 SM for USB write (PC to FPGA) SM which determines if USB accesses are registers access (16 bit address, 32 bit data) or commands Handles all the FPGA registers (R/W) Handles all commands USB_interface RW_FSM Cmd_decoder USB_register Julie Prast, LAPP18/06/20083

4. USB Interface Julie Prast, LAPP18/06/20084

5. RW_FSM Julie Prast, LAPP18/06/20085

6. Cmd_decoder Julie Prast, LAPP18/06/20086

7. USB_register Julie Prast, LAPP18/06/20087

8. False read out (Example of FPGA to PC data transfer) 18/06/2008Julie Prast, LAPP8 Entity declaration Port Map MUX in top level entity

9. USB command list Julie Prast, LAPP18/06/20089

10. USB register list Julie Prast, LAPP18/06/200810

11. Wiki web site Firmware available on https://lyosvn.in2p3.fr/ilc/wiki/VHDL 18/06/2008Julie Prast, LAPP11