2. ICC Module 3 Lesson 1 – Computer Architecture 1 / 12 © 2015 Ph. Janson Information, Computing & Communication Computer Architecture Clip 5 – Memory Circuits School of Computer Science & Communications P. Ienne (charts), Ph. Janson (commentary)

3. ICC Module 3 Lesson 1 – Computer Architecture 2 / 12 © 2015 Ph. Janson Outline ►Clip 0 – IntroductionClip 0 ►Clip 1 – Software technology – Assembler languageClip 1  Algorithms  Registers  Data instructions  Instruction numbering  Control instructions ►Clip 2 – Hardware architecture – Von Neumann’s stored program computer architectureClip 2  Data storage and processing  Control storage and processing ►Clip 3 – Hardware design – Instruction encodingClip 3 ►Harware implementation – Transistor technology  Clip 4 – Computing circuits Clip 4  Clip 5 – Memory circuits Clip 5 ►Hardware performance  Clip 6 – Logic parallelism Clip 6  Clip 7 – Architecture parallelism Clip 7 First clipPrevious clipNext clip

4. ICC Module 3 Lesson 1 – Computer Architecture 3 / 12 © 2015 Ph. Janson Data memory Instruction memory Arithm. unit Register bank Instruction decoder Instruction pointer + 1 What about data registers and memory ? ? ? ? ?

5. ICC Module 3 Lesson 1 – Computer Architecture 4 / 12 © 2015 Ph. Janson ►For computation we are all set Can one also record information with transistors? ?!

6. ICC Module 3 Lesson 1 – Computer Architecture 5 / 12 © 2015 Ph. Janson ►A « bistable » circuit, i.e. one that can be set in one of two perfectly stable states  a 1-bit memory element! An interesting circuit ‘1’‘0’ ‘1’

7. ICC Module 3 Lesson 1 – Computer Architecture 6 / 12 © 2015 Ph. Janson ►With transistors we can build enough storage for all the bits of all registers and memory banks How to write into this 1-bit memory? Data to write Data read ‘1’ ‘0’ ‘1’ ‘0’ ‘1’ ‘0’ ‘1’ r1: 2 r2: ? r3: 3 r4: ? 5 Banc de registres r3 r1 2 r3 3 écrire lire

8. ICC Module 3 Lesson 1 – Computer Architecture 7 / 12 © 2015 Ph. Janson Data memory Instruction memory Arithm. unit Register bank Instruction decoder Instruction pointer + 1 So now we can build all the architecture components! ? ? ? ?

9. ICC Module 3 Lesson 1 – Computer Architecture 8 / 12 © 2015 Ph. Janson We reached our goal Processor architecture

10. ICC Module 3 Lesson 1 – Computer Architecture 9 / 12 © 2015 Ph. Janson We reached our goal Electronic circuit

11. ICC Module 3 Lesson 1 – Computer Architecture 10 / 12 © 2015 Ph. Janson We reached our goal Very large scale integrated (VLSI) circuit (today around 10 8 -10 9 transistors)

12. ICC Module 3 Lesson 1 – Computer Architecture 11 / 12 © 2015 Ph. Janson We reached our goal

13. ICC Module 3 Lesson 1 – Computer Architecture 12 / 12 © 2015 Ph. Janson From algorithms to computers – Step 4 Hardware Software Sum of the n first integers Input : n Output: m s ← 0 as long as n > 0 s ← s + n n ← n – 1 m ← s Sum of the n first integers Input : r1 Output: r2 1: load r3, 0 2: jump_lte r1, 0, 6 3: add r3, r3, r1 4: add r1, r1, -1 5: jump 2 6: load r2, r3 Sum of the n first integers Input : r1 Output: r2 1: 01000100001100000000 2: 01011000000100000110 3: 00010010001100110001 4: 00010010000100011111 5: 00011001000000000010 6: 01000100001000110000 Programming Languages C, C++, C#, Java, Scala, Python, Perl, PHP, SQL, Excel, etc. ++