1. Paguio, Cindy Sandoval, Andrew Valdez, Rozelle

2.  Typical Lab Supply  Single Output  Flyback converter in DCM  Vi = universal supply (85V to 264V)  Io = 0 to 3A  Vo = 2V to 20V

4. NPN Configuration Overvoltage protection (24V) Overcurrent protection (3.75A)

5.  User could set the voltage output from 2V- 20V Vselect values for selected output voltages. VR1 sweep values for selected output voltages.

6.  Normal Operation Vo=20V Vo=2V Io=3A Io=0A

7.  Overcurrent Protection

8.  Overvoltage Protection

9.  Efficiency

10.  Assumptions: ◦ Efficiency = 80% ◦ fs = 175kHz ◦ δ = 0.3-0.5 ◦ Iout = 5A  Design Approach ◦ 5 Outputs (4.3V, 8.3V, 12.3V, 16.3V, 20.3V)  Tap Configuration ◦ 15V Primary Auxiliary Output  To power PWM Controller ◦ 24V Secondary Auxiliary Output  To power op-amps in linear regulator and the flyback switcher

11.  Primary Side: ◦ Core: E14-3C90 ◦ Ie = 78.6mm, Ae = 97.1mm^2, Ue =67 N = 26.68 turns  Secondary Side: 15V flyback auxiliary output: Nsec = 3.48 turns 24V flyback auxiliary output: Nsec = 4.93 turns (1) (2)

12.  Secondary Side: ◦ Multi-output tap configuration ◦ Outputs are in 4V increments (4.3V, 8.3V, 12.3V, 16.3V, 20.3V) ◦ Eq. 2 is used to get Nsec for Vout = 4.3V ◦ Nsec(4.3V) = 0.998 turns ◦ Nsec(4V) = 0.938 turns ◦ Nsec(8.3V) = Nsec(4.3V) + Nsec(4V) ◦ Nsec(12.3V) = Nsec(4.3V) + 2*Nsec(4V) … = 470 uF; δmin = 0.3

13.  PWM Controller Circuit and Switch: ◦ Osc pin:  fs = 175kHz, 1.8/RC, R >= 5kHz  R1 = 5kohms, C4 = 2nF ◦ Sense pin:  Pout = Vout,max*Iout,max = 20.3*5A=101.5W  I_peak = (5.5*Pout)/Vin,min = (5.5*101.5)/(85*sqrt(2)) = 4.64A  Rsense = 1.0/I_peak = 1.0/4.64 = 215mΩ

17.  Conditions: Vin = 85Vrms

18.  Conditions: Vin = 264Vrms

19.  Conditions: Vin = 85Vrms  Operation is in DCM

20.  Conditions: Vin = 264Vrms  Operation is in DCM

21.  Output Power = 111.82W  Input Power = 141.05  Efficiency = 79%

22.  Vselect depending on % sweep on Linear Regulator

23.  Logic circuit

24.  Computation

25.  Relay Switch