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THEMIS Instrument PDRGSE- 1 UCB, October 15-16, 2003 IDPU Ground Support Equipment Preliminary Design Review F. Harvey University of California - Berkeley
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THEMIS Instrument PDRGSE- 2 UCB, October 15-16, 2003 Overview GSE Requirements GSE Components IDPU GSE Traveling GSE Calibration GSEs “Gold Box” ETU board debug GSE Interface Board Defect Tracking Schedule Issues
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THEMIS Instrument PDRGSE- 3 UCB, October 15-16, 2003 Requirements Evolving Roles ETU Board debug: digital test signals, instrument TLM… Instrument calibration: analog stimulus, fixtures… Flight Board test IDPU GSE: STOL/ITOS/Hashii Requirements Robust for travel No data loss or corruption introduced by GSE Able to create semi-realistic input conditions for tests Flight grade electronic and mechanical interfaces. Safety checks (like FSW) for HV and deployment. Longevity
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THEMIS Instrument PDRGSE- 4 UCB, October 15-16, 2003 GSE Components Commercial GPIB-compatible power supplies GPIB-compatible waveform generator Firewire-compatible 333kSps ADC 19” 6U VME subrack Rugged traveling case Altera Stratix / Nios computer GSE computer Locally designed and built components GSE Interface Board, software and FPGA Power supply connection to backplane Motor, SMA, and load simulators. Cabling
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THEMIS Instrument PDRGSE- 5 UCB, October 15-16, 2003 IDPU GSE Properties Spacecraft-like interface to IDPU, telemetry & power User interface is modeled on Hashii/ITOS/STOL. Provides digital test patterns for ESA & SST Provides analog waveforms for instrument(s)
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THEMIS Instrument PDRGSE- 6 UCB, October 15-16, 2003 Traveling GSE Properties Robust enclosure Supports full IDPU GSE abilities, board regression testing. Does not easily support calibrations outside SSL.
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THEMIS Instrument PDRGSE- 7 UCB, October 15-16, 2003 Calibration GSEs Properties Major parts –EFI “Boom Box”. 2 varieties, 2 copies each, 4 Meters long –Vacuum chamber and pumps –Ion gun –Manipulator –Manipulator controller References –Jim Lewis’ PDR PowerPoint talks on ESA & SST –J Bonnell’s paper “Themis EFI GSE Workstation Functional Requirements”, 9/30/2003
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THEMIS Instrument PDRGSE- 8 UCB, October 15-16, 2003 “Gold Box” ETU board debug Properties Can supply digital “test patterns” for missing parts: FGE, SST, ESA Usually sends DUT’s telemetry to PC, not S/C telemetry. Small VME backplane. Shares boards with larger GSEs.
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THEMIS Instrument PDRGSE- 9 UCB, October 15-16, 2003 GSE Interface Board Overview Altera Stratix Board, mounted as daughter board 6U parent has simple non-FPGA circuits borrowed from DCB design. FPGA has CDI transmit / receive, test pattern generation, TLM receive, UART, Spin Sync logic, S/C time circuit. Tristate logic and 100 ohm resistors allow test patterns when certain boards are missing.
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THEMIS Instrument PDRGSE- 10 UCB, October 15-16, 2003 Defect Tracking NASA-compliant Defect Tracking Themis PFR (Problem Failure Report) Template file supplied with GSE software Email front end. Tracks suspected problems with Themis, FSW, GSE, interface boards, ITOS, MOC… Prioritized Cognizant Engineer is always assigned to an entry (until it’s resolved) Mission Assurance Holds Original & Tracks to Closure
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THEMIS Instrument PDRGSE- 11 UCB, October 15-16, 2003 Schedule GSE-related target dates DFB breadboard 10/27/03 (no UCB GSE planned) EFI boom calibration 11/03 PCB ETU 12/08 DCB ETU 12/15 ETC ETU 12/15 BEB (actel) ETU 1/2/04 FGE ETU 1/20/04 (no UCB GSE planned) LVPS 1/23/04 IDPU ETU 4/13/04
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THEMIS Instrument PDRGSE- 12 UCB, October 15-16, 2003 Schedule I&T Flow
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THEMIS Instrument PDRGSE- 13 UCB, October 15-16, 2003 Issues Shared Facilities Configuration control Upstairs Vacuum chamber Downstairs Vacuum chamber Tight resources for building GSEs Layout personnel Technicians FPGA engineers GSE programmers
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