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CSIS 4130 - Parallel Architectures and Algorithms Dr. Hoganson Speedup Summary Balance Point The basis for the argument against “putting all your (speedup)

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Presentation on theme: "CSIS 4130 - Parallel Architectures and Algorithms Dr. Hoganson Speedup Summary Balance Point The basis for the argument against “putting all your (speedup)"— Presentation transcript:

1 CSIS 4130 - Parallel Architectures and Algorithms Dr. Hoganson Speedup Summary Balance Point The basis for the argument against “putting all your (speedup) eggs in one basket”: Amdahl’s Law Note the balance point in the denominator where both parts are equal. Increasing N (number of processors) beyond this point can at best halve the denominator, and double the speedup.

2 CSIS 4130 - Parallel Architectures and Algorithms Dr. Hoganson Speedup Summary Parallel Speedup Summary Level 1: Pipeline

3 CSIS 4130 - Parallel Architectures and Algorithms Dr. Hoganson Speedup Summary Level 2: Superscalar – Multiple Pipelines S = number of stages n = number of instructions M = number of pipelines s = frequency of pipeline stalls f = probability that an instruction causes a pipeline flush P = Degree of Multi-pipelining (number of concurrent pipes working) Pr = fraction of total work that runs on P pipelines Unified Speedup Model

4 CSIS 4130 - Parallel Architectures and Algorithms Dr. Hoganson Speedup Summary Level 3: Algorithm Parallelism N = number of processors in the architecture Alpha = fraction of the process that can be distributed across multiple processors PA = Probability of Acceptance of requests (by the interconnection network) Unified Speedup Model

5 CSIS 4130 - Parallel Architectures and Algorithms Dr. Hoganson Speedup Summary Level 3b: Scaled Algorithm Parallelism N = number of processors in the architecture Alpha = fraction of the process that can be distributed across multiple processors PA = Probability of Acceptance of requests (by the interconnection network) k P = Scaling factor on parallel work k S = Scaling factor on serial work Unified Speedup Model

6 CSIS 4130 - Parallel Architectures and Algorithms Dr. Hoganson Speedup Summary Level 4: Multi-Process or Clustered Speedup N = number of processors in the architecture C = number of processors in a cluster Alpha = fraction of the process that can be distributed across multiple processors PA = Probability of Acceptance of requests (by the inter-cluster I.N.) k P = Scaling factor on parallel work k S = Scaling factor on serial work Unified Speedup Model

7 CSIS 4130 - Parallel Architectures and Algorithms Dr. Hoganson Speedup Summary Level 4b: Scaled Multi-Process or Clustered Speedup N = number of processors in the architecture C = number of processors in a cluster Alpha = fraction of the process that can be distributed across multiple processors PA = Probability of Acceptance of requests (by the inter-cluster I.N.) k P = Scaling factor on parallel work k S = Scaling factor on serial work k 2 = Workload scaling factor Unified Speedup Model

8 CSIS 4130 - Parallel Architectures and Algorithms Dr. Hoganson Speedup Summary Level 5: N-tiered Client-Server Distributed Parallel System Unified Speedup Model M 1 = number of Tier 1 machines (clients) m 2 = number of Tier 2 machines (server 2 )  1 = workload balance,% of workload on Tier 1 (client)  2 = % of workload on Tier 2 (server 2 ) Sup 1 = Speedup of Tier 1 machine (Levels 1 – 4)

9 CSIS 4130 - Parallel Architectures and Algorithms Dr. Hoganson Speedup Summary Level 5b: Scaled N-tiered Client-Server Distributed Parallel System Unified Speedup Model M i = number of Tier i machines  i = % of workload on Tier i Sup i = Speedup of Tier i machine (Parallel Levels 1 – 4) k C/S = Client/Server scaling factor Al i = Average Latency at Tier i PA i (k C/S )= Probability of Acceptance at Tier i (A function of k C/S )


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