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EE 5340 Semiconductor Device Theory Lecture 22 – Spring 2011 Professor Ronald L. Carter

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Presentation on theme: "EE 5340 Semiconductor Device Theory Lecture 22 – Spring 2011 Professor Ronald L. Carter"— Presentation transcript:

1 EE 5340 Semiconductor Device Theory Lecture 22 – Spring 2011 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc

2 Project Discussion – Ideal Diode equations ©rlc L22-12Apr20112 Ideal diode, J s expd(V a /(  V t )) –ideality factor,  Recombination, J s,rec exp(V a /(2  V t )) –appears in parallel with ideal term High-level injection, (J s *J KF ) 1/2 exp(V a /(2  V t )) –SPICE model by modulating ideal J s term V a = V ext - J*A*R s = V ext - I diode *R s

3 Project Discussion – Ideal Diode Forward Current Equations ©rlc L22-12Apr20113 Id = area·(Ifwd - Irev) Ifwd = forward current = Inrm·Kinj + Irec·Kgen Inrm = normal current = IS·(eVd/(N·Vt)-1) if: IKF > 0 then: Kinj = (IKF/(IKF+Inrm)) 1/2 else: Kinj = 1 Irec = recombination current = ISR·(eVd/(NR·Vt)-1)

4 ©rlc L22-12Apr20114 Dinj –N~1, rd~N*Vt/iD –rd*Cd = TT = –Cdepl given by CJO, VJ and M Drec –N~2, rd~N*Vt/iD –rd*Cd = ? –Cdepl =? SPICE Diode Model 

5 Derivation Tips ©rlc L22-12Apr20115

6 6 Gummel-Poon Static npn Circuit Model C E B B’ I LC I LE I BF I BR I CC - I EC = IS(exp(v BE /NFV t - exp(v BC /NRV t )/Q B RCRC RERE R BB

7 ©rlc L22-12Apr20117 Gummel-Poon Static npn Circuit Model C E B B’ I LC I LE I BF I BR I CC - I EC = {IS/Q B }* {exp(v BE /NFV t )- exp(v BC /NRV t )} RCRC RERE R BB Intrinsic Transistor

8 ©rlc L22-12Apr20118 Gummel Poon npn Model Equations I BF = IS  expf(v BE /NFV t )/BF I LE = ISE  expf(v BE /NEV t ) I BR = IS  expf(v BC /NRV t )/BR I LC = ISC  expf(v BC /NCV t ) Q B = (1 + v BC /VAF + v BE /VAR )  {½ +  ¼ + (BF  IBF/IKF + BR  IBR/IKR)    }

9 ©rlc L22-12Apr20119 Charge components in the BJT **From Getreau, Modeling the Bipolar Transistor, Tektronix, Inc.

10 ©rlc L22-12Apr201110 Gummel Poon Base Resistance If IRB = 0, R BB = R BM +(R B -R BM )/Q B If IRB > 0 R B = R BM + 3(R B -R BM )  (tan(z)-z)/(ztan 2 (z)) [  +  i B /(   IRB)] 1/2 -  (  /   )(i B /IRB) 1/2 z = From An Accurate Mathematical Model for the Intrinsic Base Resistance of Bipolar Transistors, by Ciubotaru and Carter, Sol.-St.Electr. 41, pp. 655-658, 1997. R BB = R bmin + R bmax /(1 + i B /I RB )  RB

11 ©rlc L22-12Apr201111 BJT Characterization Forward Gummel v BCx = 0 = v BC + i B R B - i C R C v BEx = v BE +i B R B +(i B +i C )R E i B = I BF + I LE = IS  expf(v BE /NFV t )/BF + ISE  expf(v BE /NEV t ) i C =  F I BF /Q B = IS  expf (v BE /NFV t )/Q B iCiC RCRC iBiB RERE RBRB v BEx v BC v BE + + - -

12 ©rlc L22-12Apr201112 Ideal F-G Data i C and i B (A) vs. v BE (V) N = 1  1/slope = 59.5 mV/dec N = 2  1/slope = 119 mV/dec

13 ©rlc L22-12Apr201113 BJT Characterization Reverse Gummel iEiE RCRC iBiB RERE RBRB v BCx v BC v BE + + - - v BEx = 0 = v BE + i B R B - i E R E v BCx = v BC +i B R B +(i B +i E )R C i B = I BR + I LC = IS  expf(v BC /NRV t )/BR + ISC  expf(v BC /NCV t ) i E =  R I BR /Q B = IS  expf (v BC /NRV t )/Q B

14 ©rlc L22-12Apr201114 Ideal R-G Data i E and i B (A) vs. v BE (V) N = 1  1/slope = 59.5 mV/dec N = 2  1/slope = 119 mV/dec Ie

15 ©rlc L22-12Apr201115 Ideal 2-terminal MOS capacitor/diode x -x ox 0 SiO 2 silicon substrate V gate V sub conducting gate, area = LW t sub 0 y L

16 ©rlc L22-12Apr201116 Band models (approx. scale) EoEo EcEc EvEv q  ox ~ 0.95 eV metalsilicon dioxidep-type s/c q  m = 4.1 eV for Al EoEo E Fm E Fp EoEo EcEc EvEv E Fi q  s,p q  Si = 4.05eV E g,ox ~ 8 eV

17 ©rlc L22-12Apr201117 Flat band condition (approx. scale) E c,Ox EvEv AlSiO 2 p-Si q(  m -  ox )= 3.15 eV E Fm E Fp EcEc EvEv E Fi q(  ox -  Si )=3.1eV E g,ox ~8eV q  fp = 3.95eV

18 ©rlc L22-12Apr201118 Equivalent circuit for Flat-Band Surface effect analogous to the extr Debye length = L D,extr = [  V t /(qN a )] 1/2 Debye cap, C’ D,extr =  Si /L D,extr Oxide cap, C’ Ox =  Ox /x Ox Net C is the series comb C’ Ox C’ D,extr

19 ©rlc L22-12Apr201119 References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986


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