1. Department of Communication Engineering, NCTU 1 Instructions on Programming Programmable Array Logic Devices

2. Department of Communication Engineering, NCTU 2 1. Download Lattice ispLever, Install and Register

3. Logic DesignInstructions on Programming PALSau-Hsuan Wu 3

4. Logic DesignInstructions on Programming PALSau-Hsuan Wu 4

5. Logic DesignInstructions on Programming PALSau-Hsuan Wu 5

6. Logic DesignInstructions on Programming PALSau-Hsuan Wu 6

7. Logic DesignInstructions on Programming PALSau-Hsuan Wu 7

8. Logic DesignInstructions on Programming PALSau-Hsuan Wu 8

9. Logic DesignInstructions on Programming PALSau-Hsuan Wu 9

10. Logic DesignInstructions on Programming PALSau-Hsuan Wu 10

11. Logic DesignInstructions on Programming PALSau-Hsuan Wu 11 Type in your NIC

12. Logic DesignInstructions on Programming PALSau-Hsuan Wu 12 Type in This instruction

13. Logic DesignInstructions on Programming PALSau-Hsuan Wu 13 This your NIC

14. Department of Communication Engineering, NCTU 14 2. Prepare your design with Lattice Gal20V8B

15. Logic DesignInstructions on Programming PALSau-Hsuan Wu 15

16. Logic DesignInstructions on Programming PALSau-Hsuan Wu 16

17. Logic DesignInstructions on Programming PALSau-Hsuan Wu 17

18. Logic DesignInstructions on Programming PALSau-Hsuan Wu 18 Double click to bring a dialog box

19. Logic DesignInstructions on Programming PALSau-Hsuan Wu 19

20. Logic DesignInstructions on Programming PALSau-Hsuan Wu 20 Import a file if you already have one in your project directory Otherwise, New a text file to type in your design

21. Logic DesignInstructions on Programming PALSau-Hsuan Wu 21

22. Logic DesignInstructions on Programming PALSau-Hsuan Wu 22 click this option

23. Logic DesignInstructions on Programming PALSau-Hsuan Wu 23 Double click the Compile Logic

24. Logic DesignInstructions on Programming PALSau-Hsuan Wu 24 Double click other items of Check Syntax Compiler Listing Compiled Equations Reduce Logic Reduced Equations

25. Logic DesignInstructions on Programming PALSau-Hsuan Wu 25 click this option

26. Logic DesignInstructions on Programming PALSau-Hsuan Wu 26 Double click the Link Equations

27. Logic DesignInstructions on Programming PALSau-Hsuan Wu 27 Double click other items of Fit Design Pro-Fit Equations Post-Fit Equations Filter Report Signal Cross Reference Create Fuse Map Chip Report JEDEC File

28. Logic DesignInstructions on Programming PALSau-Hsuan Wu 28 Double click the Chip Report Scroll down the lower window to see the chip layout

29. Logic DesignInstructions on Programming PALSau-Hsuan Wu 29 Bring this file and your GAL20V8B to Teaching Assistants for programming