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Published byAbraham Goodman Modified over 9 years ago
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Pipelining Pipelining is a design feature that allows multiple instructions to be run simultaneously. Speeds up the execution of instruction processing similar to the way an assembly line speeds up manufacturing.
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How does pipelining work? Instruction 1 fetched from memory. Instruction 1 decoded, Instruction 2 fetched. Instruction 1 executed, Instruction 2 decoded, Instruction 3 fetched. Instruction 2 executed, Instruction 3 decoded, Instruction 4 fetched. Etc
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How does pipelining work? Amount of speedup depends on: The amount of stages Each stage taking a similar amount of time Conditional branches Possible memory access conflicts Few hazards
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INSTRUCTION PIPELINE Execution of Three Instructions in a 4-Stage Pipeline FIDAFOEX FIDAFOEX FIDAFOEX i i+1 i+2 Conventional Pipelined FI DA FOEX FIDAFOEX FI DA FO EX i i+1 i+2
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INSTRUCTION EXECUTION IN A 4-STAGE PIPELINE 12345678910121311 FIDAFOEX 1 FIDAFOEX FIDAFOEX FIDAFOEX FIDAFOEX FIDAFOEX FIDAFOEX 2 3 4 5 6 7 FI Step: Instruction (Branch) Fetch instruction from memory Decode instruction and calculate effective address Branch? Fetch operand from memory Execute instruction Interrupt? Interrupt handling Update PC Empty pipe no yes no Segment1: Segment2: Segment3: Segment4:
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Stages of an Instruction Fetch Instruction Decode Instruction Calculate Operands Fetch Operands Execute Instruction Write Operand
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Pipeline Hazards Occurs when some or all of the pipeline must stall in order to insure correct execution Resource/Structural hazard Data hazard Control hazard
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Control Hazard Occurs when the pipeline made the wrong guess at a branch Must discard the unneeded instructions from that branch and fetch the new ones Worst case: entire pipeline must be flushed Several ways to avoid control hazards JMPIDPC+ bubbleIFIDOF OEOS Branch address dependency
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Resource Hazard (Structural Hazard) Occurs when two or more instructions need the same resource One instruction gets access to the resource, the other(and any instructions behind it) are stalled Results in the instructions being forced to execute in sequence, rather than parallel FIDAFOEX i i+1 i+2 FIDAFOEX FIDAFOEX stall
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Data Hazard Occurs when there is a conflict accessing an operand location. Results in unpredictable output that may be different than a sequential execution’s output sub eax, ebx sub ecx, eax ADDDAB,C+ INCDA+1R1bubble Data dependency R1 <- B + C R1 <- R1 + 1 Hazards in pipelines may make it necessary to stall the pipeline Pipeline Interlock: Detect Hazards Stall until it is cleared
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