1. Copyright © 2007 Elsevier Digital Design and Computer Architecture David Money Harris and Sarah L. Harris

2. Copyright © 2007 Elsevier Jumping up a few levels of abstraction. Architecture: the programmer’s view of the computer –Defined by instructions (operations) and operand locations Microarchitecture: how to implement an architecture in hardware

3. Copyright © 2007 Elsevier Microarchitecture: how to implement an architecture in hardware Processor: –Datapath: functional blocks –Control: control signals

4. Copyright © 2007 Elsevier Assembly Language To command a computer, you must understand its language. –Instructions: words in a computer’s language –Instruction set: the vocabulary of a computer’s language Instructions indicate the operation to perform and the operands to use. –Assembly language: human-readable format of instructions –Machine language: computer-readable format (1’s and 0’s) Once you’ve learned one architecture, it’s easy to learn others.

5. Copyright © 2007 Elsevier Operands A computer needs a physical location from which to retrieve binary operands A computer retrieves operands from: –Registers –Memory –Constants (also called immediates)

6. Copyright © 2007 Elsevier Operands: Registers Memory is slow. Most architectures have a small set of (fast) registers. A 32-bit architecture operates on 32-bit data.

7. Copyright © 2007 Elsevier The Stack Memory used to temporarily save variables Like a stack of dishes, last-in-first- out (LIFO) queue Expands: uses more memory when more space is needed Contracts: uses less memory when the space is no longer needed

8. Copyright © 2007 Elsevier The Stack Grows down (from higher to lower memory addresses) Stack pointer: $sp, points to top of the stack

9. Copyright © 2007 Elsevier Addressing Modes How do we address the operands? Register Only Immediate Base Addressing PC-Relative Pseudo Direct

10. Copyright © 2007 Elsevier Microarchitecture Multiple implementations for a single architecture: –Single-cycle Each instruction executes in a single cycle –Multicycle Each instruction is broken up into a series of shorter steps –Pipelined Each instruction is broken up into a series of steps Multiple instructions execute at once.

11. Copyright © 2007 Elsevier Processor Performance Program execution time Execution Time = (# instructions)(cycles/instruction)(seconds/cycle) Definitions: –Cycles/instruction = CPI –Seconds/cycle = clock period –1/CPI = Instructions/cycle = IPC Challenge is to satisfy constraints of: –Cost –Power –Performance

12. Copyright © 2007 Elsevier Architectural State Determines everything about a processor: –PC –Registers –Memory

13. Copyright © 2007 Elsevier Multicycle Processor Single-cycle microarchitecture: + simple -cycle time limited by longest instruction ( load ) -two adders/ALUs and two memories Multicycle microarchitecture: + higher clock speed + simpler instructions run faster + reuse expensive hardware on multiple cycles - sequencing overhead paid many times Same design steps: datapath & control

14. Copyright © 2007 Elsevier Control Unit