1. Veljko Radeka, Sergio Rescia, Gianluigi De Geronimo Instrumentation Division, Brookhaven National Laboratory, Upton, NY Induced Gate Noise in Charge Detection

2. Drain current noise: Induced gate noise: With a capacitive signal source induced noise voltage spectrum is white → both drain and gate noise can be referenced to the gate as an equivalent series noise resistance. Neglecting correlation : For power optimized CMOS: C gs ≤(1⁄4)C in, and the increase in R eq is < 2.5%. The effect of correlation is less than ~10%. Charge detection - capacitive signal source: (Ref. 3)

3. Real Term in the Gate Admittance unity gain frequency electron transit time

4. Real (“Damping”) Term in the Control Electrode Admittance of all Charge Controlled Devices Charge in transport: Transconductance: Unity gain frequency: Control electrode admittance: At high frequencies: Damping of tuned circuits by control electrodes with zero dc current observed in 1930’s (Ref. 1) transit time phase shift a«1 ;

5. f T (GHz) g m (mS) C gs (fF) 4 10 330 8 14 220 16 18 140 26 23 90 45 28 68 Long L Short L  ≈ 4/3 (<3?)  ≈ 2/3 <1.2 Data from: C.-H. Chen,et al., IEEE Trans. Electron devices,48, 2884(Dec. 2001) Gate Induced Noise vs f and f T NF=1dB 0.25dB

6. Drain current thermal noise vs V DS Gate current noise vs V DS From: A. J. Scholten et al., IEEE Trans. Electron Devices, 50, 618 (March 2003) Noise Enhancement with V DS in DSM MOSFETS? No significant enhancement at L=0.18  m !

7. “White noise gamma factor” vs V DS and L Gradual channel Velocity saturation region region 2/3  ≤   < 1.1 From: C.-H. Chen and M. J. Deen, IEEE Trans. Electron Devices, 49, 1484(Aug. 2002) Noise model: Channel Length Modulation (CLM)

8. Equivalent Series Noise Resistance for Charge Detection (Capacitive Source) Intrinsic channel noise Gate induced Gate resistance Substrate resistance I nduced into gate (shielded by the inversion layer!?) Transconductance= Ref.: 9 «1

9. 9 Acknowledgements Numerous discussions with Anand Kandasamy, Paul O’Connor and Pavel Rehak are gratefully acknowledged.

10. References 1. Ferris, W. R., Proc. IRE, 24, No. 1 (1936) 82 2. Van der Ziel, A., Proc. IEEE, 51 (1963) 461 3. Radeka, V., IEEE Trans. Nucl. Sci., NS-11 (1964) 358 4. Manku, T., IEEE Journal of Solid-State Circuits, 34, No. 3 (1999) 277 5 Signoracci, L., et al., Solid-State Electronics, 45 (2001) 205 6. C.-H. Chen, et al., IEEE Trans. Electron Devices, 48, (Dec. 2001) 2884 7. C.-H. Chen and M.J. Deen, IEEE Trans. Electron Devices, 49, (Aug. 2002) 1484 8. A. J. Scholten, et al., IEEE Trans. Electron Devices, 50, (March 2003) 618 9. S. V. Kishore, et al., IEEE 1999 Custom Integrated Circuits Conference, p.365