1. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, September 2004 Trigger Report - 1 CSC Trigger Muon Port Card & Sector Processor in production Mezzanine card TLK2501 serializers OptomodulesGTLP Receivers VME Interface (glue logic) 15 X 1.6 Gb/s optical links from MPC Xilinx Virtex-2 800 User I/O Muon Port Card (Rice): PPP fully tested with SP Testing w/ TMB, SP, CCB Total needed: 60 Sector Processor (Florida): PPP: fully tested Full Track Finder Firmware now incorporated Total needed: 12

2. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, September 2004 Trigger Report - 2 CSC Sorter & Clock Boards Muon Sorter (Rice): PPP: all inputs fully tested Integration tests w/Sector Processor successful Total needed: 1 Clock & Control Board (Rice): Rad-tolerant, total needed: 61 Testing complete - in production In peripheral crates & track-finder Basic VME interface uses discrete logic Critical functions immune to SEU VME/JTAGINTERFACE GTLPBACKPLANEINTERFACE MEZZANINECARD LVDSDRIVERS AND SCSI-3 CONNECTORS New TTCrq mezzanine w/QPLL ASIC

3. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, September 2004 Trigger Report - 3 Cal Trigger Receiver Cards (Wisconsin) Front with 2 of 8 mezzanine cards & 3 Adder ASICs DC-DC Adder mezz link cards BSCAN ASICs PHASE ASICs MLUs Back with all Phase & Boundary Scan ASICs Production testing underway. All 1420 mezzanine link cards produced and tested at UW Link Integration tests with ECAL & HCAL successful RC production started and 2 boards validated, all boards in hand (152). Bar Code

4. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, September 2004 Trigger Report - 4 SORT ASICs (w/heat sinks) EISO Bar Code Input Receiver Mezz. Card BSCAN ASICs Sort ASICs BSCAN ASICs Phase ASIC DC-DC Converters Clock delay adjust Clock Input Oscillator Production Electron Isolation Card & Prototype Jet-Summary Card (Wisconsin) Electron Isolation Card Production testing started 100/143 done Jet/Summary Card Full crate test - all output paths verified, electron sort, jet output all OK PPP tested, production starts this month, 25 needed Integration test with Global Cal Trigger successful Clock Card Production testing started All boards in hand, 5/25 tested

5. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, September 2004 Trigger Report - 5 Installation in Underground Counting Room Expect start in June ‘05 Racks & Infrastructure installed Sufficient time for installation & some testing but not for full commissioning w/ detectors Significant time needed for integration in synchronous pipelined system Surface tests in SX5 With both HCAL and EMU Verify trigger functions & interfaces by testing w/detectors on surface at CERN. Use to reduce commissioning time as much as possible. Will check as much on surface before gaining access to underground facilities. Planned for October ‘04 - May ‘05 Tests in Electronics Integration Facility Set up central core of critical racks Underground Counting Room FY05: Trigger Installation

6. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, September 2004 Trigger Report - 6 FY05: Trigger Install Preparation Prevessin 904 Individual Testing Labs & Integration Test Area Assemble one each of critical racks in central trigger core in underground counting room Contingency in case of further delays in occupancy

7. W. Smith, U. Wisconsin, US CMS DOE/NSF Review, September 2004 Trigger Report - 7 FY05,6: Trigger Cost & Schedule Presently on budget & on schedule for installation in USC55 starting July, 2005. Risks: Increasing production costs due to extra technician prep work on RCT Boards & Crates Have not exceeded budgeted amount but anticipate usage higher than estimated up to $100K Production testing in next 3 months will determine Possible delays in scheduled access for installation in USC55. Estimate additional cost of $30K per month of delay beyond July, 2005 (V34 schedule) Would extend trigger costs beyond end of FY05.