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CHARLES UNIVERSITY IN PRAGUE http://d3s.mff.cuni.cz/~jezek faculty of mathematics and physics Principles of Computers 14 th Lecture Pavel Ježek, Ph.D. pavel.jezek@d3s.mff.cuni.cz
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Software Interrupts CPU arch.Interrupts supported by CPU ISASoftware interrupt instruction in assembler In machine code Instruction behavior 65021 vector (16 bit address of handler) at $FFFE - $FFFF
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Software Interrupts CPU arch.Interrupts supported by CPU ISASoftware interrupt instruction in assembler In machine code Instruction behavior 65021 vector (16 bit address of handler) at $FFFE - $FFFF BRK$00
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Software Interrupts CPU arch.Interrupts supported by CPU ISASoftware interrupt instruction in assembler In machine code Instruction behavior 65021 vector (16 bit address of handler) at $FFFE - $FFFF BRK$00JSR ($FFFE)
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Software Interrupts CPU arch.Interrupts supported by CPU ISASoftware interrupt instruction in assembler In machine code Instruction behavior 65021 vector (16 bit address of handler) at $FFFE - $FFFF BRK$00JSR ($FFFE) 8086/88256 vectors with fixed base address: $0000:$0000 (1 vector = 16+16 bits = segment:offset)
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Software Interrupts CPU arch.Interrupts supported by CPU ISASoftware interrupt instruction in assembler In machine code Instruction behavior 65021 vector (16 bit address of handler) at $FFFE - $FFFF BRK$00JSR ($FFFE) 8086/88256 vectors with fixed base address: $0000:$0000 (1 vector = 16+16 bits = segment:offset) INT $xx (x = 0 … 255) $CD $xx
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Software Interrupts CPU arch.Interrupts supported by CPU ISASoftware interrupt instruction in assembler In machine code Instruction behavior 65021 vector (16 bit address of handler) at $FFFE - $FFFF BRK$00JSR ($FFFE) 8086/88256 vectors with fixed base address: $0000:$0000 (1 vector = 16+16 bits = segment:offset) INT $xx (x = 0 … 255) $CD $xxCALL [xx * 4]
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Software Interrupts CPU arch.Interrupts supported by CPU ISASoftware interrupt instruction in assembler In machine code Instruction behavior 65021 vector (16 bit address of handler) at $FFFE - $FFFF BRK$00JSR ($FFFE) 8086/88256 vectors with fixed base address: $0000:$0000 (1 vector = 16+16 bits = segment:offset) INT $xx (x = 0 … 255) $CD $xxCALL [xx * 4] >= 80286256 vectors: base address given by IDTR register INT $xx (x = 0 … 255) $CD $xx
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Software Interrupts CPU arch.Interrupts supported by CPU ISASoftware interrupt instruction in assembler In machine code Instruction behavior 65021 vector (16 bit address of handler) at $FFFE - $FFFF BRK$00JSR ($FFFE) 8086/88256 vectors with fixed base address: $0000:$0000 (1 vector = 16+16 bits = segment:offset) INT $xx (x = 0 … 255) $CD $xxCALL [xx * 4] >= 80286256 vectors: base address given by IDTR register INT $xx (x = 0 … 255) $CD $xxCALL [IDTR + xx * 4]
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Example of Firmware ABI via Software Interrupts BIOS API functions/proceduresInterrupt vector (arguments passed in registers) Disk access – e.g. read sector$13 Screen output – e.g. print text to screen$10 Keyboard input – e.g. read last key pressed$16 Get total amount of RAM installed$12 Get memory map$15
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Selected Faults/Traps/Exceptions of x86 ISA CPU ExceptionInterrupt vector (all push IP of faulting instruction) Invalid opcode6 Divide by zero (DIV0)0 Alignment check17 ($11) BIOS API functions/proceduresInterrupt vector (arguments passed in registers) Disk access – e.g. read sector$13 Screen output – e.g. print text to screen$10 Keyboard input – e.g. read last key pressed$16 Get total amount of RAM installed$12 Get memory map$15
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