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Electronics for HPS Proposal September 20, 2010 S. Boyarinov boiarino@jlab.org 1 HPS DAQ Overview Sergey Boyarinov JLAB June 17, 2014
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Electronics for HPS Proposal September 20, 2010 S. Boyarinov boiarino@jlab.org 2 Requirements Up to 50kHz event rate Up to 100MB/s data rate Dead time < 1%
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Electronics for HPS Proposal September 20, 2010 S. Boyarinov boiarino@jlab.org 3 DAQ: System Overview Calorimeter Readout: 442 channels of 12bit 250MHz Flash ADCs for Calorimeter (2 VXS crates, 4 ROCs) SVT readout system (1 ATCA crate, 8x2 ROCs, Ryan’s talk) 85ps resolution pipeline TDCs with discriminators (2 VME crates, 2 ROCs) Total 5 crates, 22 ROCs FADC-based trigger system (Ben’s talk) JLAB CODA DAQ software
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All modules are available Signal Distribution Sub-System Processor FADC250 Flash ADCCrate Trigger Processor Trigger Interface
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VXS crates with FADC and Trigger boards
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Electronics for HPS Proposal September 20, 2010 S. Boyarinov boiarino@jlab.org 6 DAQ and Trigger System (no TDCs)
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Electronics for HPS Proposal September 20, 2010 S. Boyarinov boiarino@jlab.org 7 DAQ and Trigger System (with TDCs)
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TS TI ROC TI ROC-VME ROC-GTP ROC Trigger VXS Crate Master The CODA Trigger Distribution System With TI as TS The Trigger Supervisor (TS) accepts and distributes triggers by multi-link fiber to the TI boards. A proposed extension of the TI firmware will support up to 8 ROCs per TI module. VXS Crate ATCA Crate ROC-GTP ROC-VME
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0x13 0x1 0 c,i,l,N(c,Ns) 08bit: 0x03(3) 32bit: 0x00c00013(12582931) 64bit: 0x8ecbf3000194(157006606369172) 1( 08bit: 0x00(0) 100: 16bit: 0x0159(345) 0x0248(584) 0x03a1(929) 0x04ba(1210) 0x0560(1376) 0x0564(1380) 0x04fa(1274) 0x0440(1088) 0x038d(909) 0x02e8(744) 0x0262(610) 0x0204(516) 0x01b7(439) 0x0182(386) 0x0163(355) 0x014a(330) 0x0139(313) 0x012d(301) 0x0124(292) 0x0116(278) 0x010c(268) 0x0102(258) 0x00fd(253) 0x00f5(245) 0x00f4(244) 0x00f4(244) 0x00f4(244) 0x00f2(242) 0x00ed(237) 0x00ea(234) 0x00e6(230) 0x00e4(228) 0x00e5(229) 0x00e3(227) 0x00e5(229) 0x00e5(229) 0x00e4(228) 0x00e3(227) 0x00e2(226) 0x00df(223) 0x00e0(224) 0x00de(222) 0x00e1(225) 0x00e3(227) 0x00e4(228) 0x00e6(230) 0x00e2(226) 0x00e4(228) 0x00e0(224) 0x00de(222) 0x00df(223) 0x00dd(221) 0x00dd(221) 0x00e1(225) 0x00e1(225) 0x00de(222) 0x00de(222) 0x00e1(225) 0x00e4(228) 0x00e6(230) 0x00ea(234) 0x00ee(238) 0x00ef(239) 0x00ef(239) 0x00f0(240) 0x00ee(238) 0x00eb(235) 0x00e5(229) 0x00e4(228) 0x00e2(226) 0x00e1(225) 0x00db(219) 0x00c9(201) 0x00c3(195) 0x00c3(195) 0x00c4(196) 0x00c6(198) 0x00c5(197) 0x00c1(193) 0x00c6(198) 0x00c4(196) 0x00c5(197) 0x00c6(198) 0x00c1(193) 0x00c1(193) 0x00c4(196) 0x00c6(198) 0x00c4(196) 0x00c3(195) 0x00c4(196) 0x00c3(195) 0x00c3(195) 0x00c5(197) 0x00c3(195) 0x00c4(196) 0x00c7(199) 0x00c2(194) 0x00c2(194) 0x00c5(197) 0x00c5(197) 0x85401301 0xff112001 0x1010003 0x13 0x948ecbf7 0x1 0x8d400007 0xfd400013
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Electronics for HPS Proposal September 20, 2010 S. Boyarinov boiarino@jlab.org 12 DAQ: SVT integration CODA was ported on ARM processor (zed board) with SLAC help and successfully tested with dummy readout list TI firmware almost ready, SVT-TI section must be adjusted accordingly Configuration procedures must be integrated Starting July 2014, JLAB part of DAQ will be ready for integration with SVT (was June)
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Electronics for HPS Proposal September 20, 2010 S. Boyarinov boiarino@jlab.org 13 Current Status and Timeline 2 VXS crate setup is ready (both daq and trigger system), minor issues will be resolved in few days TDAQ commissioning (Ben and Sergey): now – August 31 Ready for SVT integration: July 1
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Conclusion DAQ in 2012 test run was nearly final configuration, do not expect any problems in final HPS DAQ system JLAB part of DAQ and Trigger hardware 100% available and installed, and will be commissioned and ready by the end of August SVT integration can be started after July 1
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