1. Design & Co-design of Embedded Systems Introduction to SystemC Maziar Goudarzi

2. 2005 Design & Co-design of Embedded Systems2 Today Program zSystemC (ver. 1.0) yHistory yHighlights yDesign methodology zA simple SystemC example

3. 2005 Design & Co-design of Embedded Systems3 SystemC v0.90 Sep. 99 SystemC History Synopsys ATG Synopsys “Fridge” Synopsys “Scenic” UC Irvine 1996 Frontier Design A/RT Library 1991 SystemC v1.1 Jun. 00 Abstract Protocols IMEC 1992 CoWare “N2C” 1997 VSIA SLD Data Types Spec (draft) SystemC v1.0 Apr. 00 Fixed Point Types

4. 2005 Design & Co-design of Embedded Systems4 SystemC Highlights yModules yProcesses yPorts ySignals yRich set of port and signal types yRich set of data types yClocks yCycle-based simulation yMultiple abstraction levels yCommunication protocols yDebugging support yWaveform tracing z Features as a codesign language

5. 2005 Design & Co-design of Embedded Systems5 Current System Design Methodology C/C++ System Level Model Analysis Results Refine VHDL/Verilog Manual Conversion Simulation Synthesis Rest of Process

6. 2005 Design & Co-design of Embedded Systems6 Current System Design Methodology (cont’d) zProblems yErrors in manual conversion from C to HDL yDisconnect between system model and HDL model yMultiple system tests

7. 2005 Design & Co-design of Embedded Systems7 SystemC Design Methodology SystemC Model Simulation Refinement Synthesis Rest of Process

8. 2005 Design & Co-design of Embedded Systems8 SystemC Design Methodology (cont’d) zAdvantages yRefinement methodology yWritten in a single language yHigher productivity yReusable test benches yExecutable (compiled) event-driven simulation xCompare to interpreted simulation xCompare to compiled simulation

9. 2005 Design & Co-design of Embedded Systems9 SystemC (ver. 1.0) programming model z A set of modules interacting through signals. z Module functionality is described by processes. Mod 1 Mod 2 Mod 3

10. 2005 Design & Co-design of Embedded Systems10 SystemC Programming Model (cont’d) zSystem (program) debug/validation yTest bench xSimulation, Waveform view of signals yNormal C++ IDE facilities xWatch, Evaluate, Breakpoint,...  sc_main() function yinstantiates all modules yinitializes clocks yinitializes output waveform files ystarts simulation kernel

11. 2005 Design & Co-design of Embedded Systems11 SystemC Programming Model (cont’d) zSystemC is C++ yAny C++ statement is allowed  cout, cin, file I/O, etc yIn principle, any C++ compiler can be used xMS VC++ 6.0 for windows xGCC for Linux

12. 2005 Design & Co-design of Embedded Systems12 SystemC Basic Building Block SC_MODULE( ) { // declaring port types sc_in in; // definition of processes void entry() { // circuit functionality } SC_CTOR( ) { // declaring processes SC_METHOD(entry); sensitive<<in; } };

13. 2005 Design & Co-design of Embedded Systems13 General Structure of SystemC Models SC_MODULE( inverter ) { sc_in in; sc_out out; void entry() { out = !in.read(); static cntr=0; cout<<cntr++<<“\n”; } SC_CTOR( inverter ) { SC_METHOD(entry); sensitive<<in; } }; int sc_main(int, char*[]) { inverter not_gate(“A_NOT_GATE”); sc_clock an_alternating_signal; not_gate.in( an_alternating_signal ); sc_start(5); }

14. 2005 Design & Co-design of Embedded Systems14 A Simple Example: Defining a Module zComplex-number Multiplier (a+bi)*(c+di) = (ac-bd)+(ad+bc)i Complex Multiplier (cmplx_mult) a b c d e f SC_MODULE(cmplx_mult) { sc_in a,b; sc_in c,d; sc_out e,f;... }

15. 2005 Design & Co-design of Embedded Systems15 A Simple Example: Defining a Module (cont’d) SC_MODULE(cmplx_mult) { sc_in a,b; sc_in c,d; sc_out e,f; void calc(); SC_CTOR(cmplx_mult) { SC_METHOD(calc); sensitive<<a<<b<<c<<d; } }; void cmplx_mult::calc() { e = a*c-b*d; f = a*d+b*c; }

16. 2005 Design & Co-design of Embedded Systems16 Completing the Design M2 Complex Multiplier a b c d e f M1 input_gen M3 display clk

17. 2005 Design & Co-design of Embedded Systems17 Test Bench: input_gen module SC_MODULE(input_gen) { sc_in clk; sc_out a,b; sc_out c,d; void generate(); SC_CTOR(input_gen) { SC_THREAD(generate); sensitive_pos(clk); } }; void input_gen::generate() { int a_val=0, c_val=0; while (true) { a = a_val++; wait(); c = (c_val+=2); wait(); } }

18. 2005 Design & Co-design of Embedded Systems18 Test Bench: display module SC_MODULE(display) { sc_in e,f; void show(); SC_CTOR(display) { SC_METHOD(show); sensitive<<e<<f; } }; void display::show() { cout<<e<<‘+’<<f<<“i\n”; }

19. 2005 Design & Co-design of Embedded Systems19 Putting it all together: sc_main function #include int sc_main( int, char*[] ) { input_gen M1(“I_G”); cmplx_mult M2(“C_M”); display M3(“D”); sc_signal a,b,c,d,e,f; sc_clock clk(“clk”,20,0.5); M1.clk(clk.signal()); M1.a(a); M1.b(b); M1.c(c); M1.d(d); M2.a(a); M2.b(b); M2.c(c); M2.d(d); M2.e(e); M2.f(f); M3.e(e); M3.f(f); sc_start(100); return 0; }

20. 2005 Design & Co-design of Embedded Systems20 How to Compile & Run It? 1.Compile SystemC class library to generate systemc.lib (required just once) 2.Create a MS VC++ project & add your source files 3.Add systemc.lib to your project 4.Add c:\systemc-2.0.1\include to the default “include directory” (in project-settings) 5.Enable “Run-Time Type Information (RTTI)” (in your project-settings) 6.Compile & run. Enjoy SystemC!

21. 2005 Design & Co-design of Embedded Systems21

22. 2005 Design & Co-design of Embedded Systems22

23. 2005 Design & Co-design of Embedded Systems23 The Generated Output

24. 2005 Design & Co-design of Embedded Systems24 What we learned today zWhat’s SystemC zSystemC advantages zSystemC programming model zModeling hardware in SystemC

25. 2005 Design & Co-design of Embedded Systems25 Other notes: SystemC Installation zSystemC source files yhttp://www.systemc.orghttp://www.systemc.org yCourse web-page under “resources” tab yOur reference version: SystemC 2.0.1 unless otherwise specified

26. 2005 Design & Co-design of Embedded Systems26 Other Notes zExercise (for Tuesday): yDownload and compile SystemC 2.0.1 sources yCompile and run (simulate) today simple example