1. Fail-Safe Module for Unmanned Autonomous Vehicle
CMPE 450/490
Project Presentation
Presenters: Lai Nguyen, Jesse Xi Chen

2. Overview Introduction Theory of Operation Hardware Software
Complications
Future Improvement
Demonstration
Reference

3. Introduction University of Alberta Aerial Robotics Group (UAARG)
Current Fail-Safe Module
Simple
Need specialized microcontroller
Objective
Improve reliability
Adding features
Integrate different features onto one chip

4. Theory of Operation
Implemented in FPGA
Pulse width modulated signal

5. Implementation Hardware Software Similar architecture
VHDL only
More reliable
Software
Synthesizing a Micro-blaze soft core
Custom peripheral reading in pulse width
Converts into data available in memory mapped register
Output signal to servo motor
Similar architecture
Option to use Hardware or SW solution

6. Finite State Machine
Short Distance
Long Distance

7. Loss of Signal HW: SW: Rising edge of each pulses is usually 22.2ms
Edge difference for invalid signal:
< 22ms
> 23ms
Doesn’t work well
Majority vote of last n decisions
SW:
Take variance of last n signals
If too high -> flag LOS

8. Complications Noisy input Complication in hardware solution
Random pulse width
Fix using average pulse widths in software
Complication in hardware solution
Need more effort to develop and no debugging
Complication in software solution
Custom Peripheral synthesized initially too slow to run at bus clock of 100mhz

9. Future Improvements
Create schematics design and move the module onto PCB
Put the module onto Spartan board
Make module more configurable
Change mode of operation using jumper
Change software/hardware implementation using jumper
Change to Hardware implementation when exception encountered from Software implementation
Improved pulse width detection

10. Reference UAARG: Xilinx: Application notes:
Xilinx:
Application notes:

11. Demonstration
RC Control mode
Auto-Pilot Mode
Gliding
Crash

12. Hardware for testing FPGA board Xilinx Virtex II Pro
RC Radio Controller
RC Receiver
Servo motors

13. Module Operation Controller Receiver FPGA Servo Motor RF signal
Detect RF signal
Pulse width modulated signal
FPGA
Functionality
Servo Motor

14. HW SW Interface Micro-blaze processor Compile the soft core
Custom peripheral to detect pulse width
Converts into data available in memory mapped register
Keep the output behaviour similar to HW solution